
Amanda Lee Bailey
Examiner (ID: 3862)
| Most Active Art Unit | 3673 |
| Art Unit(s) | 3673 |
| Total Applications | 484 |
| Issued Applications | 252 |
| Pending Applications | 47 |
| Abandoned Applications | 193 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 441350
[patent_doc_number] => 07260010
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-08-21
[patent_title] => 'Refresh control circuit and method for multi-bank structure DRAM'
[patent_app_type] => utility
[patent_app_number] => 11/604947
[patent_app_country] => US
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Array
(
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[patent_doc_number] => 20090220346
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[patent_kind] => A1
[patent_issue_date] => 2009-09-03
[patent_title] => 'Radial Compressor Rotor'
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Array
(
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[patent_doc_number] => 07463524
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[patent_issue_date] => 2008-12-09
[patent_title] => 'Reading and writing method for non-volatile memory with multiple data states'
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Array
(
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[patent_kind] => B2
[patent_issue_date] => 2011-02-08
[patent_title] => 'Memory control device'
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Array
(
[id] => 5153124
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[patent_issue_date] => 2007-02-15
[patent_title] => 'System and method for mode register control of data bus operating mode and impedance'
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Array
(
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[patent_title] => 'Internal address generator for use in semiconductor memory device'
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Array
(
[id] => 4942922
[patent_doc_number] => 20080080247
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[patent_title] => 'Low voltage low capacitance flash memory array'
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[firstpage_image] =>[orig_patent_app_number] => 11540319
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/540319 | Low voltage low capacitance flash memory array | Sep 27, 2006 | Issued |
Array
(
[id] => 7596640
[patent_doc_number] => 07619942
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[patent_issue_date] => 2009-11-17
[patent_title] => 'Multi-port memory device having self-refresh mode'
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[patent_app_number] => 11/540381
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/540381 | Multi-port memory device having self-refresh mode | Sep 27, 2006 | Issued |
Array
(
[id] => 4590565
[patent_doc_number] => 07852705
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[patent_issue_date] => 2010-12-14
[patent_title] => 'Method of and circuit for configuring a plurality of memory elements'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/527887 | Method of and circuit for configuring a plurality of memory elements | Sep 26, 2006 | Issued |
Array
(
[id] => 879232
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[patent_issue_date] => 2008-04-15
[patent_title] => 'Non-volatile semiconductor memory device, erase method for same, and test method for same'
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[patent_app_number] => 11/518207
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/518207 | Non-volatile semiconductor memory device, erase method for same, and test method for same | Sep 10, 2006 | Issued |
Array
(
[id] => 585713
[patent_doc_number] => 07460396
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[patent_issue_date] => 2008-12-02
[patent_title] => 'Semiconductor device'
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Array
(
[id] => 4703274
[patent_doc_number] => 20080062797
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[patent_title] => 'REFRESH SEQUENCE CONTROL FOR MULTIPLE MEMORY ELEMENTS'
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Array
(
[id] => 5170351
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Array
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Array
(
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/465323 | Flash memory device having pump with multiple output voltages | Aug 16, 2006 | Issued |
Array
(
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Array
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Array
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