Search

Amanda Lee Bailey

Examiner (ID: 3862)

Most Active Art Unit
3673
Art Unit(s)
3673
Total Applications
484
Issued Applications
252
Pending Applications
47
Abandoned Applications
193

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5153136 [patent_doc_number] => 20070036018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-15 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/459779 [patent_app_country] => US [patent_app_date] => 2006-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11680 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20070036018.pdf [firstpage_image] =>[orig_patent_app_number] => 11459779 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/459779
Semiconductor device and method for driving the same Jul 24, 2006 Issued
Array ( [id] => 798570 [patent_doc_number] => 07428163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-23 [patent_title] => 'Method and memory circuit for operating a resistive memory cell' [patent_app_type] => utility [patent_app_number] => 11/459289 [patent_app_country] => US [patent_app_date] => 2006-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3858 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/428/07428163.pdf [firstpage_image] =>[orig_patent_app_number] => 11459289 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/459289
Method and memory circuit for operating a resistive memory cell Jul 20, 2006 Issued
Array ( [id] => 4908407 [patent_doc_number] => 20080019173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-24 [patent_title] => 'SYSTEM FOR CONFIGURING COMPENSATION' [patent_app_type] => utility [patent_app_number] => 11/458995 [patent_app_country] => US [patent_app_date] => 2006-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 19149 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20080019173.pdf [firstpage_image] =>[orig_patent_app_number] => 11458995 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/458995
System for configuring compensation Jul 19, 2006 Issued
Array ( [id] => 467056 [patent_doc_number] => 07239569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-03 [patent_title] => 'Semiconductor memory device and memory system' [patent_app_type] => utility [patent_app_number] => 11/488785 [patent_app_country] => US [patent_app_date] => 2006-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 33 [patent_no_of_words] => 14808 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/239/07239569.pdf [firstpage_image] =>[orig_patent_app_number] => 11488785 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/488785
Semiconductor memory device and memory system Jul 18, 2006 Issued
Array ( [id] => 824498 [patent_doc_number] => 07405973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-29 [patent_title] => 'Repair circuit of semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/485281 [patent_app_country] => US [patent_app_date] => 2006-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2916 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/405/07405973.pdf [firstpage_image] =>[orig_patent_app_number] => 11485281 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/485281
Repair circuit of semiconductor memory device Jul 12, 2006 Issued
Array ( [id] => 4993465 [patent_doc_number] => 20070008810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-11 [patent_title] => 'Clock-independent mode register setting methods and apparatuses' [patent_app_type] => utility [patent_app_number] => 11/481187 [patent_app_country] => US [patent_app_date] => 2006-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4920 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20070008810.pdf [firstpage_image] =>[orig_patent_app_number] => 11481187 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/481187
Clock-independent mode register setting methods and apparatuses Jul 5, 2006 Issued
Array ( [id] => 5170349 [patent_doc_number] => 20070070780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Output driving device' [patent_app_type] => utility [patent_app_number] => 11/477481 [patent_app_country] => US [patent_app_date] => 2006-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2907 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20070070780.pdf [firstpage_image] =>[orig_patent_app_number] => 11477481 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/477481
Output driving device Jun 29, 2006 Issued
Array ( [id] => 895064 [patent_doc_number] => 07345913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-18 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/476567 [patent_app_country] => US [patent_app_date] => 2006-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 7608 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/345/07345913.pdf [firstpage_image] =>[orig_patent_app_number] => 11476567 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/476567
Semiconductor memory device Jun 28, 2006 Issued
Array ( [id] => 338952 [patent_doc_number] => 07505297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-17 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/480197 [patent_app_country] => US [patent_app_date] => 2006-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3038 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/505/07505297.pdf [firstpage_image] =>[orig_patent_app_number] => 11480197 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/480197
Semiconductor memory device Jun 28, 2006 Issued
Array ( [id] => 6586753 [patent_doc_number] => 20100061851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-11 [patent_title] => 'Secondary Air Charger' [patent_app_type] => utility [patent_app_number] => 11/993994 [patent_app_country] => US [patent_app_date] => 2006-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2661 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20100061851.pdf [firstpage_image] =>[orig_patent_app_number] => 11993994 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/993994
Secondary Air Charger Jun 27, 2006 Abandoned
Array ( [id] => 5640863 [patent_doc_number] => 20060279318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'Semiconductor device for reducing soft error rate with reduced power consumption' [patent_app_type] => utility [patent_app_number] => 11/450267 [patent_app_country] => US [patent_app_date] => 2006-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3956 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20060279318.pdf [firstpage_image] =>[orig_patent_app_number] => 11450267 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/450267
Semiconductor device for reducing soft error rate with reduced power consumption Jun 11, 2006 Issued
Array ( [id] => 5164412 [patent_doc_number] => 20070285996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'Shared memory synchronization systems and methods' [patent_app_type] => utility [patent_app_number] => 11/451079 [patent_app_country] => US [patent_app_date] => 2006-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5430 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20070285996.pdf [firstpage_image] =>[orig_patent_app_number] => 11451079 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/451079
Shared memory synchronization systems and methods Jun 11, 2006 Issued
Array ( [id] => 5044771 [patent_doc_number] => 20070263443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'Method, apparatus, and system for providing initial state random access memory' [patent_app_type] => utility [patent_app_number] => 11/449755 [patent_app_country] => US [patent_app_date] => 2006-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3650 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20070263443.pdf [firstpage_image] =>[orig_patent_app_number] => 11449755 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/449755
Method, apparatus, and system for providing initial state random access memory Jun 8, 2006 Issued
Array ( [id] => 5164425 [patent_doc_number] => 20070286009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'Serial memory interface' [patent_app_type] => utility [patent_app_number] => 11/449105 [patent_app_country] => US [patent_app_date] => 2006-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7506 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0286/20070286009.pdf [firstpage_image] =>[orig_patent_app_number] => 11449105 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/449105
Serial memory interface Jun 7, 2006 Issued
Array ( [id] => 5687092 [patent_doc_number] => 20060285407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'Memory device' [patent_app_type] => utility [patent_app_number] => 11/448521 [patent_app_country] => US [patent_app_date] => 2006-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5492 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20060285407.pdf [firstpage_image] =>[orig_patent_app_number] => 11448521 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/448521
Memory device Jun 6, 2006 Issued
Array ( [id] => 327684 [patent_doc_number] => 07515465 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-04-07 [patent_title] => 'Structures and methods to store information representable by a multiple bit binary word in electrically erasable, programmable read-only memories (EEPROM)' [patent_app_type] => utility [patent_app_number] => 11/449223 [patent_app_country] => US [patent_app_date] => 2006-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 32 [patent_no_of_words] => 7625 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/515/07515465.pdf [firstpage_image] =>[orig_patent_app_number] => 11449223 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/449223
Structures and methods to store information representable by a multiple bit binary word in electrically erasable, programmable read-only memories (EEPROM) Jun 6, 2006 Issued
Array ( [id] => 585773 [patent_doc_number] => 07460402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-02 [patent_title] => 'Semiconductor memory device which generates voltages corresponding to a plurality of threshold voltages' [patent_app_type] => utility [patent_app_number] => 11/447983 [patent_app_country] => US [patent_app_date] => 2006-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 26 [patent_no_of_words] => 9987 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/460/07460402.pdf [firstpage_image] =>[orig_patent_app_number] => 11447983 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/447983
Semiconductor memory device which generates voltages corresponding to a plurality of threshold voltages Jun 6, 2006 Issued
Array ( [id] => 5153127 [patent_doc_number] => 20070036009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-15 [patent_title] => 'Semiconductor memory devices and methods for generating column enable signals thereof' [patent_app_type] => utility [patent_app_number] => 11/446291 [patent_app_country] => US [patent_app_date] => 2006-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6418 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20070036009.pdf [firstpage_image] =>[orig_patent_app_number] => 11446291 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/446291
Semiconductor memory devices and methods for generating column enable signals thereof Jun 4, 2006 Issued
Array ( [id] => 919738 [patent_doc_number] => 07324382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-29 [patent_title] => 'Current-mode sensing structure used in high-density multiple-port register in logic processing and method for the same' [patent_app_type] => utility [patent_app_number] => 11/443037 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1603 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/324/07324382.pdf [firstpage_image] =>[orig_patent_app_number] => 11443037 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/443037
Current-mode sensing structure used in high-density multiple-port register in logic processing and method for the same May 30, 2006 Issued
Array ( [id] => 5009487 [patent_doc_number] => 20070279965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-06 [patent_title] => 'Method and apparatus for avoiding cell data destruction caused by SRAM cell instability' [patent_app_type] => utility [patent_app_number] => 11/444019 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 4776 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20070279965.pdf [firstpage_image] =>[orig_patent_app_number] => 11444019 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/444019
Method and apparatus for avoiding cell data destruction caused by SRAM cell instability May 30, 2006 Issued
Menu