Search

Amanda Lee Bailey

Examiner (ID: 3862)

Most Active Art Unit
3673
Art Unit(s)
3673
Total Applications
484
Issued Applications
252
Pending Applications
47
Abandoned Applications
193

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5654253 [patent_doc_number] => 20060139988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Isolation device over field in a memory device' [patent_app_type] => utility [patent_app_number] => 11/358234 [patent_app_country] => US [patent_app_date] => 2006-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6766 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20060139988.pdf [firstpage_image] =>[orig_patent_app_number] => 11358234 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/358234
Isolation device over field in a memory device Feb 20, 2006 Issued
Array ( [id] => 409876 [patent_doc_number] => 07286381 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-23 [patent_title] => 'Non-volatile and-type content addressable memory' [patent_app_type] => utility [patent_app_number] => 11/355419 [patent_app_country] => US [patent_app_date] => 2006-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6627 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/286/07286381.pdf [firstpage_image] =>[orig_patent_app_number] => 11355419 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/355419
Non-volatile and-type content addressable memory Feb 15, 2006 Issued
Array ( [id] => 824512 [patent_doc_number] => 07405987 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-07-29 [patent_title] => 'Low voltage, high gain current/voltage sense amplifier with improved read access time' [patent_app_type] => utility [patent_app_number] => 11/340103 [patent_app_country] => US [patent_app_date] => 2006-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6439 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/405/07405987.pdf [firstpage_image] =>[orig_patent_app_number] => 11340103 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/340103
Low voltage, high gain current/voltage sense amplifier with improved read access time Jan 25, 2006 Issued
Array ( [id] => 5840463 [patent_doc_number] => 20060120125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Semiconductor memory device and defect remedying method thereof' [patent_app_type] => utility [patent_app_number] => 11/330220 [patent_app_country] => US [patent_app_date] => 2006-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 118 [patent_figures_cnt] => 118 [patent_no_of_words] => 51664 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20060120125.pdf [firstpage_image] =>[orig_patent_app_number] => 11330220 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/330220
Semiconductor memory device and defect remedying method thereof Jan 11, 2006 Issued
Array ( [id] => 4987271 [patent_doc_number] => 20070153609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'One-time programmable memory and method of burning data of the same' [patent_app_type] => utility [patent_app_number] => 11/325541 [patent_app_country] => US [patent_app_date] => 2006-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1751 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20070153609.pdf [firstpage_image] =>[orig_patent_app_number] => 11325541 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/325541
One-time programmable memory and method of burning data of the same Jan 4, 2006 Abandoned
Array ( [id] => 5782364 [patent_doc_number] => 20060203579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'DEVICE AND METHOD FOR COMPENSATING DEFECT IN SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 11/306381 [patent_app_country] => US [patent_app_date] => 2005-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4989 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20060203579.pdf [firstpage_image] =>[orig_patent_app_number] => 11306381 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/306381
Device and method for compensating defect in semiconductor memory Dec 26, 2005 Issued
Array ( [id] => 4796411 [patent_doc_number] => 20080007997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-10 [patent_title] => 'Pmc Memory With Improved Retention Time And Writing Speed' [patent_app_type] => utility [patent_app_number] => 11/722761 [patent_app_country] => US [patent_app_date] => 2005-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3116 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20080007997.pdf [firstpage_image] =>[orig_patent_app_number] => 11722761 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/722761
PMC memory with improved retention time and writing speed Dec 19, 2005 Issued
Array ( [id] => 895126 [patent_doc_number] => 07345928 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-18 [patent_title] => 'Data recovery methods in multi-state memory after program fail' [patent_app_type] => utility [patent_app_number] => 11/304783 [patent_app_country] => US [patent_app_date] => 2005-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 45 [patent_no_of_words] => 21243 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/345/07345928.pdf [firstpage_image] =>[orig_patent_app_number] => 11304783 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/304783
Data recovery methods in multi-state memory after program fail Dec 13, 2005 Issued
Array ( [id] => 887692 [patent_doc_number] => 07352610 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-04-01 [patent_title] => 'Volatile memory elements with soft error upset immunity for programmable logic device integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/295815 [patent_app_country] => US [patent_app_date] => 2005-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 51 [patent_no_of_words] => 13109 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/352/07352610.pdf [firstpage_image] =>[orig_patent_app_number] => 11295815 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/295815
Volatile memory elements with soft error upset immunity for programmable logic device integrated circuits Dec 5, 2005 Issued
Array ( [id] => 5140405 [patent_doc_number] => 20070002621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'Non-volatile memory device, and multi-page program, read and copyback program method thereof' [patent_app_type] => utility [patent_app_number] => 11/295887 [patent_app_country] => US [patent_app_date] => 2005-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5841 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20070002621.pdf [firstpage_image] =>[orig_patent_app_number] => 11295887 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/295887
Non-volatile memory device, and multi-page program, read and copyback program method thereof Dec 5, 2005 Issued
Array ( [id] => 135473 [patent_doc_number] => 07697364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-13 [patent_title] => 'Memory architecture having multiple partial wordline drivers and contacted and feed-through bitlines' [patent_app_type] => utility [patent_app_number] => 11/291219 [patent_app_country] => US [patent_app_date] => 2005-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5527 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/697/07697364.pdf [firstpage_image] =>[orig_patent_app_number] => 11291219 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/291219
Memory architecture having multiple partial wordline drivers and contacted and feed-through bitlines Nov 30, 2005 Issued
Array ( [id] => 490154 [patent_doc_number] => 07218563 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-05-15 [patent_title] => 'Method and apparatus for reading data from nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 11/282541 [patent_app_country] => US [patent_app_date] => 2005-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3159 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/218/07218563.pdf [firstpage_image] =>[orig_patent_app_number] => 11282541 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/282541
Method and apparatus for reading data from nonvolatile memory Nov 17, 2005 Issued
Array ( [id] => 7602646 [patent_doc_number] => 07236389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-26 [patent_title] => 'Cross-point RRAM memory array having low bit line crosstalk' [patent_app_type] => utility [patent_app_number] => 11/283135 [patent_app_country] => US [patent_app_date] => 2005-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 1659 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/236/07236389.pdf [firstpage_image] =>[orig_patent_app_number] => 11283135 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/283135
Cross-point RRAM memory array having low bit line crosstalk Nov 16, 2005 Issued
Array ( [id] => 854714 [patent_doc_number] => 07379339 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-27 [patent_title] => 'Device and procedure for measuring memory cell currents' [patent_app_type] => utility [patent_app_number] => 11/274483 [patent_app_country] => US [patent_app_date] => 2005-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6307 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/379/07379339.pdf [firstpage_image] =>[orig_patent_app_number] => 11274483 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/274483
Device and procedure for measuring memory cell currents Nov 15, 2005 Issued
Array ( [id] => 7606505 [patent_doc_number] => 07099214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-29 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/280109 [patent_app_country] => US [patent_app_date] => 2005-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7200 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/099/07099214.pdf [firstpage_image] =>[orig_patent_app_number] => 11280109 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/280109
Semiconductor memory device Nov 15, 2005 Issued
Array ( [id] => 28583 [patent_doc_number] => RE041638 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2010-09-07 [patent_title] => 'Semiconductor memory' [patent_app_type] => reissue [patent_app_number] => 11/265744 [patent_app_country] => US [patent_app_date] => 2005-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 17568 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/041/RE041638.pdf [firstpage_image] =>[orig_patent_app_number] => 11265744 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/265744
Semiconductor memory Nov 2, 2005 Issued
Array ( [id] => 543222 [patent_doc_number] => 07180817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-20 [patent_title] => 'Semiconductor memory device with column selecting switches in hierarchical structure' [patent_app_type] => utility [patent_app_number] => 11/262801 [patent_app_country] => US [patent_app_date] => 2005-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6067 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/180/07180817.pdf [firstpage_image] =>[orig_patent_app_number] => 11262801 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/262801
Semiconductor memory device with column selecting switches in hierarchical structure Oct 31, 2005 Issued
Array ( [id] => 478698 [patent_doc_number] => 07227810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-05 [patent_title] => 'Semiconductor device and testing method for semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/262937 [patent_app_country] => US [patent_app_date] => 2005-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3722 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/227/07227810.pdf [firstpage_image] =>[orig_patent_app_number] => 11262937 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/262937
Semiconductor device and testing method for semiconductor device Oct 31, 2005 Issued
Array ( [id] => 5698785 [patent_doc_number] => 20060215469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Semiconductor device and skew adjusting method' [patent_app_type] => utility [patent_app_number] => 11/260199 [patent_app_country] => US [patent_app_date] => 2005-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3916 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20060215469.pdf [firstpage_image] =>[orig_patent_app_number] => 11260199 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/260199
Semiconductor device and skew adjusting method Oct 27, 2005 Issued
Array ( [id] => 870791 [patent_doc_number] => 07366022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-29 [patent_title] => 'Apparatus for programming of multi-state non-volatile memory using smart verify' [patent_app_type] => utility [patent_app_number] => 11/259799 [patent_app_country] => US [patent_app_date] => 2005-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 13236 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/366/07366022.pdf [firstpage_image] =>[orig_patent_app_number] => 11259799 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/259799
Apparatus for programming of multi-state non-volatile memory using smart verify Oct 26, 2005 Issued
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