Amanda Lee Bailey

Array ( [id] => 7376679 [patent_doc_number] => 20040080997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-29 [patent_title] => 'Electronic control system' [patent_app_type] => new [patent_app_number] => 10/678229 [patent_app_country] => US [patent_app_date] => 2003-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5473 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20040080997.pdf [firstpage_image] =>[orig_patent_app_number] => 10678229 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 931962 [patent_doc_number] => 06980473 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-27 [patent_title] => 'Memory device and method' [patent_app_type] => utility [patent_app_number] => 10/677031 [patent_app_country] => US [patent_app_date] => 2003-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4193 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/980/06980473.pdf [firstpage_image] =>[orig_patent_app_number] => 10677031 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 745515 [patent_doc_number] => 07031177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-18 [patent_title] => 'Non-volatile and-type content addressable memory' [patent_app_type] => utility [patent_app_number] => 10/676731 [patent_app_country] => US [patent_app_date] => 2003-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5588 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/031/07031177.pdf [firstpage_image] =>[orig_patent_app_number] => 10676731 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1032614 [patent_doc_number] => 06879514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-12 [patent_title] => 'Magnetoresistive element and magnetic memory unit' [patent_app_type] => utility [patent_app_number] => 10/673025 [patent_app_country] => US [patent_app_date] => 2003-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 11053 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/879/06879514.pdf [firstpage_image] =>[orig_patent_app_number] => 10673025 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7279758 [patent_doc_number] => 20040062135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Semiconductor integrated circuit device and self-test method of memory macro' [patent_app_type] => new [patent_app_number] => 10/669427 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9169 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20040062135.pdf [firstpage_image] =>[orig_patent_app_number] => 10669427 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1130894 [patent_doc_number] => 06791857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-14 [patent_title] => 'Method and article for concentrating fields at sense layers' [patent_app_type] => B2 [patent_app_number] => 10/668442 [patent_app_country] => US [patent_app_date] => 2003-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 4384 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/791/06791857.pdf [firstpage_image] =>[orig_patent_app_number] => 10668442 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7268766 [patent_doc_number] => 20040057284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'DDR synchronous flash memory with virtual segment architecture' [patent_app_type] => new [patent_app_number] => 10/668443 [patent_app_country] => US [patent_app_date] => 2003-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6384 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20040057284.pdf [firstpage_image] =>[orig_patent_app_number] => 10668443 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7126223 [patent_doc_number] => 20050057967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'Non-volatile memory and method with bit line compensation dependent on neighboring operating modes' [patent_app_type] => utility [patent_app_number] => 10/667223 [patent_app_country] => US [patent_app_date] => 2003-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9661 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 22 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20050057967.pdf [firstpage_image] =>[orig_patent_app_number] => 10667223 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 714001 [patent_doc_number] => 07057946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-06 [patent_title] => 'Semiconductor integrated circuit having latching means capable of scanning' [patent_app_type] => utility [patent_app_number] => 10/662309 [patent_app_country] => US [patent_app_date] => 2003-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 9652 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/057/07057946.pdf [firstpage_image] =>[orig_patent_app_number] => 10662309 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 383908 [patent_doc_number] => 07307862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-11 [patent_title] => 'Circuit and system for accessing memory modules' [patent_app_type] => utility [patent_app_number] => 10/655927 [patent_app_country] => US [patent_app_date] => 2003-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3472 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/307/07307862.pdf [firstpage_image] =>[orig_patent_app_number] => 10655927 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1023568 [patent_doc_number] => 06888737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-03 [patent_title] => 'Ferroelectric memory and method of reading the same' [patent_app_type] => utility [patent_app_number] => 10/654352 [patent_app_country] => US [patent_app_date] => 2003-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 5187 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/888/06888737.pdf [firstpage_image] =>[orig_patent_app_number] => 10654352 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1130929 [patent_doc_number] => 06791872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-14 [patent_title] => 'Method and article for concentrating fields at sense layers' [patent_app_type] => B2 [patent_app_number] => 10/652446 [patent_app_country] => US [patent_app_date] => 2003-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 4385 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/791/06791872.pdf [firstpage_image] =>[orig_patent_app_number] => 10652446 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 791359 [patent_doc_number] => 06985385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-10 [patent_title] => 'Magnetic memory element utilizing spin transfer switching and storing multiple bits' [patent_app_type] => utility [patent_app_number] => 10/649119 [patent_app_country] => US [patent_app_date] => 2003-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 12488 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/985/06985385.pdf [firstpage_image] =>[orig_patent_app_number] => 10649119 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7032282 [patent_doc_number] => 20050030791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'METHOD WRITING DATA TO A LARGE BLOCK OF A FLASH MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 10/632927 [patent_app_country] => US [patent_app_date] => 2003-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1820 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20050030791.pdf [firstpage_image] =>[orig_patent_app_number] => 10632927 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7232860 [patent_doc_number] => 20050262289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'Semiconductor integrated circuit device, data processing system and memory system' [patent_app_type] => utility [patent_app_number] => 10/518431 [patent_app_country] => US [patent_app_date] => 2003-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 14077 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20050262289.pdf [firstpage_image] =>[orig_patent_app_number] => 10518431 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7301210 [patent_doc_number] => 20040113187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'NAND-type magnetoresistive RAM' [patent_app_type] => new [patent_app_number] => 10/608195 [patent_app_country] => US [patent_app_date] => 2003-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2824 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20040113187.pdf [firstpage_image] =>[orig_patent_app_number] => 10608195 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7360394 [patent_doc_number] => 20040004882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'Combination of SRAM and MROM cells' [patent_app_type] => new [patent_app_number] => 10/608527 [patent_app_country] => US [patent_app_date] => 2003-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2053 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20040004882.pdf [firstpage_image] =>[orig_patent_app_number] => 10608527 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7358153 [patent_doc_number] => 20040090811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-13 [patent_title] => 'Nonvolatile FeRAM control device' [patent_app_type] => new [patent_app_number] => 10/608427 [patent_app_country] => US [patent_app_date] => 2003-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6818 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20040090811.pdf [firstpage_image] =>[orig_patent_app_number] => 10608427 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7297806 [patent_doc_number] => 20040125650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'MAGNETIC RANDOM ACCESS MEMORY DEVICE WITH A REDUCED NUMBER OF INTERCONNECTIONS FOR SELECTION OF ADDRESS' [patent_app_type] => new [patent_app_number] => 10/461429 [patent_app_country] => US [patent_app_date] => 2003-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10181 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20040125650.pdf [firstpage_image] =>[orig_patent_app_number] => 10461429 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7627349 [patent_doc_number] => 06807092 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-19 [patent_title] => 'MRAM cell having frustrated magnetic reservoirs' [patent_app_type] => B1 [patent_app_number] => 10/461029 [patent_app_country] => US [patent_app_date] => 2003-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3354 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/807/06807092.pdf [firstpage_image] =>[orig_patent_app_number] => 10461029 [rel_patent_id] =>[rel_patent_doc_number] =>)