Search

Amanda Lee Bailey

Examiner (ID: 3862)

Most Active Art Unit
3673
Art Unit(s)
3673
Total Applications
484
Issued Applications
252
Pending Applications
47
Abandoned Applications
193

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7376537 [patent_doc_number] => 20040080972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-29 [patent_title] => 'Non-volatile SRAM' [patent_app_type] => new [patent_app_number] => 10/279371 [patent_app_country] => US [patent_app_date] => 2002-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3047 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20040080972.pdf [firstpage_image] =>[orig_patent_app_number] => 10279371 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/279371
Non-volatile SRAM Oct 23, 2002 Issued
Array ( [id] => 1026557 [patent_doc_number] => 06885574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-26 [patent_title] => 'Low fatigue sensing method and circuit for ferroelectric non-volatile storage units' [patent_app_type] => utility [patent_app_number] => 10/281075 [patent_app_country] => US [patent_app_date] => 2002-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4175 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/885/06885574.pdf [firstpage_image] =>[orig_patent_app_number] => 10281075 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/281075
Low fatigue sensing method and circuit for ferroelectric non-volatile storage units Oct 23, 2002 Issued
Array ( [id] => 1247715 [patent_doc_number] => 06678197 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-13 [patent_title] => 'Systems and methods for reducing the effect of noise while reading data from memory' [patent_app_type] => B1 [patent_app_number] => 10/273623 [patent_app_country] => US [patent_app_date] => 2002-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7969 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/678/06678197.pdf [firstpage_image] =>[orig_patent_app_number] => 10273623 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/273623
Systems and methods for reducing the effect of noise while reading data from memory Oct 17, 2002 Issued
Array ( [id] => 1051702 [patent_doc_number] => 06862237 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-01 [patent_title] => 'Data access method of semiconductor memory device and semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/261951 [patent_app_country] => US [patent_app_date] => 2002-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 15786 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/862/06862237.pdf [firstpage_image] =>[orig_patent_app_number] => 10261951 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/261951
Data access method of semiconductor memory device and semiconductor memory device Oct 1, 2002 Issued
Array ( [id] => 7352349 [patent_doc_number] => 20040012989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-22 [patent_title] => 'Multi-bank content addressable memory (CAM) devices having segment-based priority resolution circuits therein and methods of operating same' [patent_app_type] => new [patent_app_number] => 10/263223 [patent_app_country] => US [patent_app_date] => 2002-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 16532 [patent_no_of_claims] => 81 [patent_no_of_ind_claims] => 27 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20040012989.pdf [firstpage_image] =>[orig_patent_app_number] => 10263223 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/263223
Multi-bank content addressable memory (CAM) devices having segment-based priority resolution circuits therein and methods operating same Oct 1, 2002 Issued
Array ( [id] => 6782044 [patent_doc_number] => 20030063491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Magneto resistive film, method of manufacturing magnetoresistive film, and memory using magnetoresistive film' [patent_app_type] => new [patent_app_number] => 10/259623 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5662 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20030063491.pdf [firstpage_image] =>[orig_patent_app_number] => 10259623 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/259623
Magnetoresistive film, method of manufacturing magnetoresistive film, and memory using magnetoresistive film Sep 29, 2002 Issued
Array ( [id] => 7279706 [patent_doc_number] => 20040062083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Method for defining the initial state of static random access memory' [patent_app_type] => new [patent_app_number] => 10/262631 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3672 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20040062083.pdf [firstpage_image] =>[orig_patent_app_number] => 10262631 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/262631
Method for defining the initial state of static random access memory Sep 29, 2002 Issued
Array ( [id] => 7633719 [patent_doc_number] => 06657901 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-02 [patent_title] => 'Semiconductor device formed in a rectangle region on a semiconductor substrate including a voltage generating circuit' [patent_app_type] => B2 [patent_app_number] => 10/254980 [patent_app_country] => US [patent_app_date] => 2002-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 117 [patent_figures_cnt] => 162 [patent_no_of_words] => 51552 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/657/06657901.pdf [firstpage_image] =>[orig_patent_app_number] => 10254980 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/254980
Semiconductor device formed in a rectangle region on a semiconductor substrate including a voltage generating circuit Sep 25, 2002 Issued
Array ( [id] => 1418693 [patent_doc_number] => 06535415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-18 [patent_title] => 'Semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/251772 [patent_app_country] => US [patent_app_date] => 2002-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 13735 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/535/06535415.pdf [firstpage_image] =>[orig_patent_app_number] => 10251772 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/251772
Semiconductor device Sep 22, 2002 Issued
Array ( [id] => 1332132 [patent_doc_number] => 06603686 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-05 [patent_title] => 'Semiconductor memory device having different data rates in read operation and write operation' [patent_app_type] => B2 [patent_app_number] => 10/246744 [patent_app_country] => US [patent_app_date] => 2002-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4053 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/603/06603686.pdf [firstpage_image] =>[orig_patent_app_number] => 10246744 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/246744
Semiconductor memory device having different data rates in read operation and write operation Sep 18, 2002 Issued
Array ( [id] => 1216132 [patent_doc_number] => 06711069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-23 [patent_title] => 'Register having a ferromagnetic memory cells' [patent_app_type] => B2 [patent_app_number] => 10/239127 [patent_app_country] => US [patent_app_date] => 2002-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1825 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/711/06711069.pdf [firstpage_image] =>[orig_patent_app_number] => 10239127 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/239127
Register having a ferromagnetic memory cells Sep 18, 2002 Issued
Array ( [id] => 7610486 [patent_doc_number] => 06842372 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-11 [patent_title] => 'EEPROM cell having a floating-gate transistor within a cell well and a process for fabricating the memory cell' [patent_app_type] => utility [patent_app_number] => 10/236829 [patent_app_country] => US [patent_app_date] => 2002-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4160 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/842/06842372.pdf [firstpage_image] =>[orig_patent_app_number] => 10236829 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/236829
EEPROM cell having a floating-gate transistor within a cell well and a process for fabricating the memory cell Sep 5, 2002 Issued
Array ( [id] => 684198 [patent_doc_number] => 07082060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-25 [patent_title] => 'Soft programming for recovery of overerasure' [patent_app_type] => utility [patent_app_number] => 10/232219 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3500 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/082/07082060.pdf [firstpage_image] =>[orig_patent_app_number] => 10232219 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/232219
Soft programming for recovery of overerasure Aug 28, 2002 Issued
Array ( [id] => 7131891 [patent_doc_number] => 20040042309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Isolation device over field in a memory device' [patent_app_type] => new [patent_app_number] => 10/233325 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6755 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20040042309.pdf [firstpage_image] =>[orig_patent_app_number] => 10233325 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/233325
Isolation device over field in a memory device Aug 28, 2002 Issued
Array ( [id] => 7131784 [patent_doc_number] => 20040042267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Method for reducing drain disturb in programming' [patent_app_type] => new [patent_app_number] => 10/230927 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3884 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20040042267.pdf [firstpage_image] =>[orig_patent_app_number] => 10230927 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/230927
Method for reducing drain disturb in programming Aug 28, 2002 Issued
Array ( [id] => 997793 [patent_doc_number] => 06914805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-05 [patent_title] => 'Method for building a magnetic keeper or flux concentrator used for writing magnetic bits on a MRAM device' [patent_app_type] => utility [patent_app_number] => 10/226623 [patent_app_country] => US [patent_app_date] => 2002-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 5887 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/914/06914805.pdf [firstpage_image] =>[orig_patent_app_number] => 10226623 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/226623
Method for building a magnetic keeper or flux concentrator used for writing magnetic bits on a MRAM device Aug 20, 2002 Issued
Array ( [id] => 6748003 [patent_doc_number] => 20030042523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-06 [patent_title] => 'Semiconductor integrated circuit device having link element' [patent_app_type] => new [patent_app_number] => 10/207174 [patent_app_country] => US [patent_app_date] => 2002-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2956 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20030042523.pdf [firstpage_image] =>[orig_patent_app_number] => 10207174 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/207174
Semiconductor integrated circuit device having link element Jul 29, 2002 Issued
Array ( [id] => 6687337 [patent_doc_number] => 20030031060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Register without restriction of number of mounted memory devices and memory module having the same' [patent_app_type] => new [patent_app_number] => 10/206823 [patent_app_country] => US [patent_app_date] => 2002-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8312 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20030031060.pdf [firstpage_image] =>[orig_patent_app_number] => 10206823 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/206823
Register without restriction of number of mounted memory devices and memory module having the same Jul 28, 2002 Issued
Array ( [id] => 6742910 [patent_doc_number] => 20030020093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-30 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => new [patent_app_number] => 10/205423 [patent_app_country] => US [patent_app_date] => 2002-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 25154 [patent_no_of_claims] => 76 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20030020093.pdf [firstpage_image] =>[orig_patent_app_number] => 10205423 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/205423
Semiconductor integrated circuit Jul 25, 2002 Issued
Array ( [id] => 1185366 [patent_doc_number] => 06738305 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-18 [patent_title] => 'Standby mode circuit design for SRAM standby power reduction' [patent_app_type] => B1 [patent_app_number] => 10/205519 [patent_app_country] => US [patent_app_date] => 2002-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2401 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/738/06738305.pdf [firstpage_image] =>[orig_patent_app_number] => 10205519 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/205519
Standby mode circuit design for SRAM standby power reduction Jul 24, 2002 Issued
Menu