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Amanda Lee Bailey

Examiner (ID: 3862)

Most Active Art Unit
3673
Art Unit(s)
3673
Total Applications
484
Issued Applications
252
Pending Applications
47
Abandoned Applications
193

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1368221 [patent_doc_number] => 06577538 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-10 [patent_title] => 'Channel-erase nonvolatile semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/197847 [patent_app_country] => US [patent_app_date] => 2002-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 6039 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/577/06577538.pdf [firstpage_image] =>[orig_patent_app_number] => 10197847 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/197847
Channel-erase nonvolatile semiconductor memory device Jul 18, 2002 Issued
Array ( [id] => 1219892 [patent_doc_number] => 06707694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-16 [patent_title] => 'Multi-match detection circuit for use with content-addressable memories' [patent_app_type] => B2 [patent_app_number] => 10/186725 [patent_app_country] => US [patent_app_date] => 2002-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4151 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/707/06707694.pdf [firstpage_image] =>[orig_patent_app_number] => 10186725 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/186725
Multi-match detection circuit for use with content-addressable memories Jul 1, 2002 Issued
Array ( [id] => 6777591 [patent_doc_number] => 20030048672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-13 [patent_title] => 'On chip scrambling' [patent_app_type] => new [patent_app_number] => 10/186327 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6618 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20030048672.pdf [firstpage_image] =>[orig_patent_app_number] => 10186327 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/186327
On chip scrambling Jun 27, 2002 Issued
Array ( [id] => 6173063 [patent_doc_number] => 20020154563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'Fuse read sequence for auto refresh power reduction' [patent_app_type] => new [patent_app_number] => 10/175723 [patent_app_country] => US [patent_app_date] => 2002-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4822 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20020154563.pdf [firstpage_image] =>[orig_patent_app_number] => 10175723 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/175723
Fuse read sequence for auto refresh power reduction Jun 19, 2002 Issued
Array ( [id] => 1372378 [patent_doc_number] => 06574144 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-03 [patent_title] => 'Flash memory with nanocrystalline silicon film coating gate' [patent_app_type] => B2 [patent_app_number] => 10/176425 [patent_app_country] => US [patent_app_date] => 2002-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3077 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/574/06574144.pdf [firstpage_image] =>[orig_patent_app_number] => 10176425 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/176425
Flash memory with nanocrystalline silicon film coating gate Jun 17, 2002 Issued
10/069525 Self-erasing memory cell Jun 12, 2002 Abandoned
Array ( [id] => 6644009 [patent_doc_number] => 20030007384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/162619 [patent_app_country] => US [patent_app_date] => 2002-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10323 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20030007384.pdf [firstpage_image] =>[orig_patent_app_number] => 10162619 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/162619
Nonvolatile semiconductor memory device Jun 5, 2002 Issued
Array ( [id] => 1219891 [patent_doc_number] => 06707693 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-16 [patent_title] => 'Content addressable memory with simultaneous write and compare function' [patent_app_type] => B1 [patent_app_number] => 10/163263 [patent_app_country] => US [patent_app_date] => 2002-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 41 [patent_no_of_words] => 25365 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/707/06707693.pdf [firstpage_image] =>[orig_patent_app_number] => 10163263 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/163263
Content addressable memory with simultaneous write and compare function Jun 4, 2002 Issued
Array ( [id] => 1183170 [patent_doc_number] => 06744661 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Radiation-hardened static memory cell using isolation technology' [patent_app_type] => B1 [patent_app_number] => 10/146523 [patent_app_country] => US [patent_app_date] => 2002-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4398 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744661.pdf [firstpage_image] =>[orig_patent_app_number] => 10146523 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/146523
Radiation-hardened static memory cell using isolation technology May 14, 2002 Issued
Array ( [id] => 1238771 [patent_doc_number] => 06690595 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-10 [patent_title] => 'Content addressable memory with selective error logging' [patent_app_type] => B1 [patent_app_number] => 10/121344 [patent_app_country] => US [patent_app_date] => 2002-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 40 [patent_no_of_words] => 25555 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/690/06690595.pdf [firstpage_image] =>[orig_patent_app_number] => 10121344 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/121344
Content addressable memory with selective error logging Apr 11, 2002 Issued
Array ( [id] => 6864342 [patent_doc_number] => 20030189868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-09 [patent_title] => 'Early power-down digital memory device and method' [patent_app_type] => new [patent_app_number] => 10/119919 [patent_app_country] => US [patent_app_date] => 2002-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4944 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20030189868.pdf [firstpage_image] =>[orig_patent_app_number] => 10119919 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/119919
Early power-down digital memory device and method Apr 8, 2002 Issued
Array ( [id] => 6864341 [patent_doc_number] => 20030189867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-09 [patent_title] => 'Distributed FIFO in synchronous memory' [patent_app_type] => new [patent_app_number] => 10/118281 [patent_app_country] => US [patent_app_date] => 2002-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3407 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20030189867.pdf [firstpage_image] =>[orig_patent_app_number] => 10118281 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/118281
Distributed FIFO in synchronous memory Apr 7, 2002 Issued
Array ( [id] => 980442 [patent_doc_number] => 06930937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Sector synchronized test method and circuit for memory' [patent_app_type] => utility [patent_app_number] => 10/115779 [patent_app_country] => US [patent_app_date] => 2002-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2066 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930937.pdf [firstpage_image] =>[orig_patent_app_number] => 10115779 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/115779
Sector synchronized test method and circuit for memory Apr 2, 2002 Issued
Array ( [id] => 1319227 [patent_doc_number] => 06614694 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-02 [patent_title] => 'Erase scheme for non-volatile memory' [patent_app_type] => B1 [patent_app_number] => 10/112707 [patent_app_country] => US [patent_app_date] => 2002-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1840 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/614/06614694.pdf [firstpage_image] =>[orig_patent_app_number] => 10112707 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/112707
Erase scheme for non-volatile memory Apr 1, 2002 Issued
Array ( [id] => 1180310 [patent_doc_number] => 06751148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Circuit for generating control signal using make-link type fuse' [patent_app_type] => B2 [patent_app_number] => 10/114523 [patent_app_country] => US [patent_app_date] => 2002-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5444 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/751/06751148.pdf [firstpage_image] =>[orig_patent_app_number] => 10114523 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/114523
Circuit for generating control signal using make-link type fuse Apr 1, 2002 Issued
Array ( [id] => 6728850 [patent_doc_number] => 20030185040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'FeRAM with a single access/ multiple-comparison operation' [patent_app_type] => new [patent_app_number] => 10/115753 [patent_app_country] => US [patent_app_date] => 2002-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3618 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20030185040.pdf [firstpage_image] =>[orig_patent_app_number] => 10115753 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/115753
FeRAM with a single access/multiple-comparison operation Apr 1, 2002 Issued
Array ( [id] => 7622988 [patent_doc_number] => 06687177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-03 [patent_title] => 'Reference cells with integration capacitor' [patent_app_type] => B2 [patent_app_number] => 10/109879 [patent_app_country] => US [patent_app_date] => 2002-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4411 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/687/06687177.pdf [firstpage_image] =>[orig_patent_app_number] => 10109879 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/109879
Reference cells with integration capacitor Mar 31, 2002 Issued
Array ( [id] => 7963117 [patent_doc_number] => 06680871 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-20 [patent_title] => 'Method and apparatus for testing memory embedded in mask-programmable logic device' [patent_app_type] => B1 [patent_app_number] => 10/112803 [patent_app_country] => US [patent_app_date] => 2002-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5902 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/680/06680871.pdf [firstpage_image] =>[orig_patent_app_number] => 10112803 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/112803
Method and apparatus for testing memory embedded in mask-programmable logic device Mar 28, 2002 Issued
Array ( [id] => 1234533 [patent_doc_number] => 06693842 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-17 [patent_title] => 'Semiconductor device having a plurality of output signals' [patent_app_type] => B2 [patent_app_number] => 10/108671 [patent_app_country] => US [patent_app_date] => 2002-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5082 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/693/06693842.pdf [firstpage_image] =>[orig_patent_app_number] => 10108671 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/108671
Semiconductor device having a plurality of output signals Mar 27, 2002 Issued
Array ( [id] => 6728893 [patent_doc_number] => 20030185083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Low cost protable memory system' [patent_app_type] => new [patent_app_number] => 10/112309 [patent_app_country] => US [patent_app_date] => 2002-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 947 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20030185083.pdf [firstpage_image] =>[orig_patent_app_number] => 10112309 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/112309
Low cost protable memory system Mar 26, 2002 Abandoned
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