
Amanda Lee Bailey
Examiner (ID: 3862)
| Most Active Art Unit | 3673 |
| Art Unit(s) | 3673 |
| Total Applications | 484 |
| Issued Applications | 252 |
| Pending Applications | 47 |
| Abandoned Applications | 193 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6728842
[patent_doc_number] => 20030185032
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-02
[patent_title] => 'Dual bus memory controller'
[patent_app_type] => new
[patent_app_number] => 10/108243
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[pdf_file] => publications/A1/0185/20030185032.pdf
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Array
(
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[patent_issue_date] => 2003-01-21
[patent_title] => 'Semiconductor memory device'
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Array
(
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[patent_issue_date] => 2003-05-06
[patent_title] => 'Capacitorless DRAM gain cell'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/063119 | Capacitorless DRAM gain cell | Mar 21, 2002 | Issued |
Array
(
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[patent_title] => 'DDR synchronous flash memory with virtual segment architecture'
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Array
(
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[patent_title] => 'Asynchronous interface circuit and method for a pseudo-static memory device'
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Array
(
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[patent_title] => 'Semiconductor memory device having error correction function for data reading during refresh operation'
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Array
(
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[patent_title] => 'Semiconductor device having simplified internal data transfer'
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Array
(
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[patent_title] => 'Semiconductor memory device including an SOI'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/094918 | Semiconductor memory device including an SOI substrate | Mar 11, 2002 | Issued |
Array
(
[id] => 1401964
[patent_doc_number] => 06552934
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[patent_title] => 'Apparatus and method for programming voltage protection in a non-volatile memory system'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/082972 | Apparatus and method for programming voltage protection in a non-volatile memory system | Feb 25, 2002 | Issued |
Array
(
[id] => 6506518
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[patent_title] => 'Segmented bit line EEPROM page architecture'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/082698 | Segmented bit line EEPROM page architecture | Feb 24, 2002 | Issued |
Array
(
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[patent_title] => 'Narrow contact design for magnetic random access memory (MRAM) arrays'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/080415 | Narrow contact design for magnetic random access memory (MRAM) arrays | Feb 21, 2002 | Issued |
Array
(
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[patent_title] => 'Magnetoresistive random access memory (MRAM) cross-point array with reduced parasitic effects'
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Array
(
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Array
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Array
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Array
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Array
(
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Array
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