Search

Amar Movva

Examiner (ID: 10775, Phone: (571)272-9009 , Office: P/2898 )

Most Active Art Unit
2898
Art Unit(s)
2894, 2898, 2891
Total Applications
1159
Issued Applications
888
Pending Applications
90
Abandoned Applications
210

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19926307 [patent_doc_number] => 12300601 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Interconnect structure [patent_app_type] => utility [patent_app_number] => 17/884263 [patent_app_country] => US [patent_app_date] => 2022-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4851 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884263 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884263
Interconnect structure Aug 8, 2022 Issued
Array ( [id] => 18961146 [patent_doc_number] => 20240049473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => MEMORY DEVICE ASSEMBLY WITH A LEAKER DEVICE [patent_app_type] => utility [patent_app_number] => 17/818219 [patent_app_country] => US [patent_app_date] => 2022-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17874 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17818219 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/818219
MEMORY DEVICE ASSEMBLY WITH A LEAKER DEVICE Aug 7, 2022 Pending
Array ( [id] => 20146809 [patent_doc_number] => 12381156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Redistribution substrate and semiconductor package including the same [patent_app_type] => utility [patent_app_number] => 17/879106 [patent_app_country] => US [patent_app_date] => 2022-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7893 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17879106 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/879106
Redistribution substrate and semiconductor package including the same Aug 1, 2022 Issued
Array ( [id] => 18008725 [patent_doc_number] => 20220367492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => SYSTEM AND METHOD FOR REDUCING CELL AREA AND CURRENT LEAKAGE IN ANTI-FUSE CELL ARRAY [patent_app_type] => utility [patent_app_number] => 17/876103 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12240 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876103 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876103
System and method for reducing cell area and current leakage in anti-fuse cell array Jul 27, 2022 Issued
Array ( [id] => 17963928 [patent_doc_number] => 20220344509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => Metal Gate with Silicon Sidewall Spacers [patent_app_type] => utility [patent_app_number] => 17/811690 [patent_app_country] => US [patent_app_date] => 2022-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5026 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17811690 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/811690
Metal gate with silicon sidewall spacers Jul 10, 2022 Issued
Array ( [id] => 19679394 [patent_doc_number] => 12191267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Nanowire bonding interconnect for fine-pitch microelectronics [patent_app_type] => utility [patent_app_number] => 17/811713 [patent_app_country] => US [patent_app_date] => 2022-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5981 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17811713 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/811713
Nanowire bonding interconnect for fine-pitch microelectronics Jul 10, 2022 Issued
Array ( [id] => 19781530 [patent_doc_number] => 12230568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Interconnection structure of integrated circuit semiconductor device [patent_app_type] => utility [patent_app_number] => 17/856366 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 7067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856366 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/856366
Interconnection structure of integrated circuit semiconductor device Jun 30, 2022 Issued
Array ( [id] => 17933305 [patent_doc_number] => 20220328431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => METHODS TO EMBED MAGNETIC MATERIAL AS FIRST LAYER ON CORELESS SUBSTRATES AND CORRESPONDING STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/852003 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852003 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852003
Methods to embed magnetic material as first layer on coreless substrates and corresponding structures Jun 27, 2022 Issued
Array ( [id] => 18866077 [patent_doc_number] => 20230420514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => 2D LAYERED GATE OXIDE [patent_app_type] => utility [patent_app_number] => 17/852016 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6243 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852016 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852016
2D LAYERED GATE OXIDE Jun 27, 2022 Pending
Array ( [id] => 19842764 [patent_doc_number] => 12255164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Structure and method for isolation of bit-line drivers for a three-dimensional NAND [patent_app_type] => utility [patent_app_number] => 17/850276 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 16354 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17850276 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/850276
Structure and method for isolation of bit-line drivers for a three-dimensional NAND Jun 26, 2022 Issued
Array ( [id] => 18848990 [patent_doc_number] => 20230411394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => OFFSET POWER RAIL [patent_app_type] => utility [patent_app_number] => 17/807877 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6201 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17807877 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/807877
OFFSET POWER RAIL Jun 20, 2022 Pending
Array ( [id] => 18848990 [patent_doc_number] => 20230411394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => OFFSET POWER RAIL [patent_app_type] => utility [patent_app_number] => 17/807877 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6201 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17807877 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/807877
OFFSET POWER RAIL Jun 20, 2022 Pending
Array ( [id] => 17933512 [patent_doc_number] => 20220328638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => SEMICONDUCTOR DEVICE AND FORMATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/845036 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845036 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/845036
Semiconductor device and formation method thereof Jun 20, 2022 Issued
Array ( [id] => 17933512 [patent_doc_number] => 20220328638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => SEMICONDUCTOR DEVICE AND FORMATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/845036 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845036 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/845036
Semiconductor device and formation method thereof Jun 20, 2022 Issued
Array ( [id] => 18381945 [patent_doc_number] => 20230157036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => SEMICONDUCTOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/839612 [patent_app_country] => US [patent_app_date] => 2022-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17839612 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/839612
Semiconductor memory devices Jun 13, 2022 Issued
Array ( [id] => 18381945 [patent_doc_number] => 20230157036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => SEMICONDUCTOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/839612 [patent_app_country] => US [patent_app_date] => 2022-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17839612 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/839612
Semiconductor memory devices Jun 13, 2022 Issued
Array ( [id] => 18548271 [patent_doc_number] => 11721631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Via structures having tapered profiles for embedded interconnect bridge substrates [patent_app_type] => utility [patent_app_number] => 17/752717 [patent_app_country] => US [patent_app_date] => 2022-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 7052 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17752717 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/752717
Via structures having tapered profiles for embedded interconnect bridge substrates May 23, 2022 Issued
Array ( [id] => 18812238 [patent_doc_number] => 20230386575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells [patent_app_type] => utility [patent_app_number] => 17/752207 [patent_app_country] => US [patent_app_date] => 2022-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7454 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17752207 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/752207
Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells May 23, 2022 Issued
Array ( [id] => 18006743 [patent_doc_number] => 20220365509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => METHODS AND APPARATUS FOR MACHINE LEARNING PREDICTIONS OF MANUFACTURE PROCESSES [patent_app_type] => utility [patent_app_number] => 17/750549 [patent_app_country] => US [patent_app_date] => 2022-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13378 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750549 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/750549
Methods and apparatus for machine learning predictions of manufacture processes May 22, 2022 Issued
Array ( [id] => 18256573 [patent_doc_number] => 20230083612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/661820 [patent_app_country] => US [patent_app_date] => 2022-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15321 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17661820 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/661820
DISPLAY DEVICE May 2, 2022 Pending
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