Search

Amar Movva

Examiner (ID: 1949, Phone: (571)272-9009 , Office: P/2898 )

Most Active Art Unit
2898
Art Unit(s)
2894, 2891, 2898
Total Applications
1193
Issued Applications
913
Pending Applications
83
Abandoned Applications
212

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18851113 [patent_doc_number] => 20230413517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/989115 [patent_app_country] => US [patent_app_date] => 2022-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8161 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17989115 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/989115
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Nov 16, 2022 Pending
Array ( [id] => 19670927 [patent_doc_number] => 12183698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Structure and method for isolation of bit-line drivers for a three-dimensional NAND [patent_app_type] => utility [patent_app_number] => 17/988454 [patent_app_country] => US [patent_app_date] => 2022-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 16355 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17988454 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/988454
Structure and method for isolation of bit-line drivers for a three-dimensional NAND Nov 15, 2022 Issued
Array ( [id] => 20776462 [patent_doc_number] => 12660154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-16 [patent_title] => Microelectronic devices, and related methods of forming microelectronic devices [patent_app_type] => utility [patent_app_number] => 18/054316 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 13727 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18054316 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/054316
Microelectronic devices, and related methods of forming microelectronic devices Nov 9, 2022 Issued
Array ( [id] => 18257509 [patent_doc_number] => 20230084549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => 3D SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING SAME [patent_app_type] => utility [patent_app_number] => 17/983007 [patent_app_country] => US [patent_app_date] => 2022-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17983007 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/983007
3D semiconductor memory device and method of fabricating same Nov 7, 2022 Issued
Array ( [id] => 18671901 [patent_doc_number] => 11778834 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Three-dimensional (3D) semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/983024 [patent_app_country] => US [patent_app_date] => 2022-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 9541 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17983024 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/983024
Three-dimensional (3D) semiconductor memory device Nov 7, 2022 Issued
Array ( [id] => 18363596 [patent_doc_number] => 20230145187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => INTEGRATED CIRCUIT DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/980728 [patent_app_country] => US [patent_app_date] => 2022-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10534 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17980728 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/980728
INTEGRATED CIRCUIT DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME Nov 3, 2022 Issued
Array ( [id] => 18761614 [patent_doc_number] => 11812670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Memory device comprising a top via electrode and methods of making such a memory device [patent_app_type] => utility [patent_app_number] => 18/052307 [patent_app_country] => US [patent_app_date] => 2022-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5897 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18052307 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/052307
Memory device comprising a top via electrode and methods of making such a memory device Nov 2, 2022 Issued
Array ( [id] => 18768547 [patent_doc_number] => 11818971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => PCM cell with resistance drift correction [patent_app_type] => utility [patent_app_number] => 17/977336 [patent_app_country] => US [patent_app_date] => 2022-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5313 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17977336 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/977336
PCM cell with resistance drift correction Oct 30, 2022 Issued
Array ( [id] => 19966629 [patent_doc_number] => 12336166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Semiconductor structure and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 17/952336 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 0 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 330 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952336 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/952336
Semiconductor structure and fabrication method thereof Sep 25, 2022 Issued
Array ( [id] => 18253555 [patent_doc_number] => 20230080594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => METHOD FOR THE MANUFACTURE OF INTEGRATED DEVICES INCLUDING A DIE FIXED TO A LEADFRAME [patent_app_type] => utility [patent_app_number] => 17/933016 [patent_app_country] => US [patent_app_date] => 2022-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2870 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17933016 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/933016
Method for the manufacture of integrated devices including a die fixed to a leadframe Sep 15, 2022 Issued
Array ( [id] => 19007968 [patent_doc_number] => 20240072039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => ELECTROSTATIC PROTECTION CIRCUIT AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/897302 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17897302 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/897302
Electrostatic protection circuit and manufacturing method thereof, array substrate and display device Aug 28, 2022 Issued
Array ( [id] => 18952522 [patent_doc_number] => 11895840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 17/895182 [patent_app_country] => US [patent_app_date] => 2022-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 67 [patent_figures_cnt] => 67 [patent_no_of_words] => 18071 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17895182 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/895182
Memory device Aug 24, 2022 Issued
Array ( [id] => 18975341 [patent_doc_number] => 20240055433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => SEMICONDUCTOR STRUCTURE WITH BACKSIDE POWER MESH AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/819053 [patent_app_country] => US [patent_app_date] => 2022-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11575 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17819053 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/819053
Semiconductor structure with backside power mesh and method of forming the same Aug 10, 2022 Issued
Array ( [id] => 19926307 [patent_doc_number] => 12300601 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Interconnect structure [patent_app_type] => utility [patent_app_number] => 17/884263 [patent_app_country] => US [patent_app_date] => 2022-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4851 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884263 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884263
Interconnect structure Aug 8, 2022 Issued
Array ( [id] => 20807374 [patent_doc_number] => 12672293 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-30 [patent_title] => Memory device assembly with a leaker device [patent_app_type] => utility [patent_app_number] => 17/818219 [patent_app_country] => US [patent_app_date] => 2022-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 13533 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17818219 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/818219
Memory device assembly with a leaker device Aug 7, 2022 Issued
Array ( [id] => 20146809 [patent_doc_number] => 12381156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Redistribution substrate and semiconductor package including the same [patent_app_type] => utility [patent_app_number] => 17/879106 [patent_app_country] => US [patent_app_date] => 2022-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7893 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17879106 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/879106
Redistribution substrate and semiconductor package including the same Aug 1, 2022 Issued
Array ( [id] => 18008725 [patent_doc_number] => 20220367492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => SYSTEM AND METHOD FOR REDUCING CELL AREA AND CURRENT LEAKAGE IN ANTI-FUSE CELL ARRAY [patent_app_type] => utility [patent_app_number] => 17/876103 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12240 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876103 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876103
System and method for reducing cell area and current leakage in anti-fuse cell array Jul 27, 2022 Issued
Array ( [id] => 17963928 [patent_doc_number] => 20220344509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => Metal Gate with Silicon Sidewall Spacers [patent_app_type] => utility [patent_app_number] => 17/811690 [patent_app_country] => US [patent_app_date] => 2022-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5026 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17811690 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/811690
Metal gate with silicon sidewall spacers Jul 10, 2022 Issued
Array ( [id] => 19679394 [patent_doc_number] => 12191267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Nanowire bonding interconnect for fine-pitch microelectronics [patent_app_type] => utility [patent_app_number] => 17/811713 [patent_app_country] => US [patent_app_date] => 2022-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5981 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17811713 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/811713
Nanowire bonding interconnect for fine-pitch microelectronics Jul 10, 2022 Issued
Array ( [id] => 19781530 [patent_doc_number] => 12230568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Interconnection structure of integrated circuit semiconductor device [patent_app_type] => utility [patent_app_number] => 17/856366 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 7067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856366 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/856366
Interconnection structure of integrated circuit semiconductor device Jun 30, 2022 Issued
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