Search

Amber D. Steele

Examiner (ID: 5727, Phone: (571)272-5538 , Office: P/1676 )

Most Active Art Unit
1658
Art Unit(s)
1676, 1639, 1654, 1658
Total Applications
1273
Issued Applications
621
Pending Applications
157
Abandoned Applications
533

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18876622 [patent_doc_number] => 11864468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Magnetoresistive random access memory [patent_app_type] => utility [patent_app_number] => 17/348776 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3591 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17348776 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/348776
Magnetoresistive random access memory Jun 15, 2021 Issued
Array ( [id] => 17485642 [patent_doc_number] => 20220093146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => MAGNETORESISTANCE MEMORY DEVICE AND METHOD OF MANUFACTURING MAGNETORESISTANCE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/349203 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6909 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17349203 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/349203
Magnetoresistance memory device and method of manufacturing magnetoresistance memory device Jun 15, 2021 Issued
Array ( [id] => 17141979 [patent_doc_number] => 20210309991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => METHODS OF GENE ASSEMBLY AND THEIR USE IN DNA DATA STORAGE [patent_app_type] => utility [patent_app_number] => 17/348642 [patent_app_country] => US [patent_app_date] => 2021-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8526 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17348642 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/348642
Methods of gene assembly and their use in DNA data storage Jun 14, 2021 Issued
Array ( [id] => 17691878 [patent_doc_number] => 20220199171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT, SEMICONDUCTOR STORAGE DEVICE, AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 17/347914 [patent_app_country] => US [patent_app_date] => 2021-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13445 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17347914 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/347914
Semiconductor integrated circuit, semiconductor storage device, and control method Jun 14, 2021 Issued
Array ( [id] => 18952524 [patent_doc_number] => 11895842 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Nonvolatile memory device having cell on periphery structure [patent_app_type] => utility [patent_app_number] => 17/345832 [patent_app_country] => US [patent_app_date] => 2021-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 27 [patent_no_of_words] => 14973 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17345832 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/345832
Nonvolatile memory device having cell on periphery structure Jun 10, 2021 Issued
Array ( [id] => 17660476 [patent_doc_number] => 20220180941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/344005 [patent_app_country] => US [patent_app_date] => 2021-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344005 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/344005
Semiconductor memory device and method of operating the same Jun 9, 2021 Issued
Array ( [id] => 18190422 [patent_doc_number] => 11581023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Power delivery circuitry [patent_app_type] => utility [patent_app_number] => 17/344105 [patent_app_country] => US [patent_app_date] => 2021-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 5305 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344105 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/344105
Power delivery circuitry Jun 9, 2021 Issued
Array ( [id] => 18053902 [patent_doc_number] => 11527293 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Nonvolatile memory device and method of programming in the same [patent_app_type] => utility [patent_app_number] => 17/341837 [patent_app_country] => US [patent_app_date] => 2021-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12364 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341837 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/341837
Nonvolatile memory device and method of programming in the same Jun 7, 2021 Issued
Array ( [id] => 18061419 [patent_doc_number] => 20220392505 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => VOLTAGE-CONTROLLED MAGNETIC ANISOTROPY MEMORY DEVICE INCLUDING AN ANISOTROPY-ENHANCING DUST LAYER AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/341119 [patent_app_country] => US [patent_app_date] => 2021-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17097 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341119 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/341119
Voltage-controlled magnetic anisotropy memory device including an anisotropy-enhancing dust layer and methods for forming the same Jun 6, 2021 Issued
Array ( [id] => 18061866 [patent_doc_number] => 20220392953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => VOLTAGE-CONTROLLED MAGNETIC ANISOTROPY MEMORY DEVICE INCLUDING AN ANISOTROPY-ENHANCING DUST LAYER AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/341090 [patent_app_country] => US [patent_app_date] => 2021-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17097 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341090 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/341090
Voltage-controlled magnetic anisotropy memory device including an anisotropy-enhancing dust layer and methods for forming the same Jun 6, 2021 Issued
Array ( [id] => 18892886 [patent_doc_number] => 11871679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Voltage-controlled magnetic anisotropy memory device including an anisotropy-enhancing dust layer and methods for forming the same [patent_app_type] => utility [patent_app_number] => 17/341049 [patent_app_country] => US [patent_app_date] => 2021-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 17097 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341049 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/341049
Voltage-controlled magnetic anisotropy memory device including an anisotropy-enhancing dust layer and methods for forming the same Jun 6, 2021 Issued
Array ( [id] => 18480992 [patent_doc_number] => 11694743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Chip and associated chip system [patent_app_type] => utility [patent_app_number] => 17/340062 [patent_app_country] => US [patent_app_date] => 2021-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3241 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340062 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/340062
Chip and associated chip system Jun 5, 2021 Issued
Array ( [id] => 17115303 [patent_doc_number] => 20210295900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => PERFORMING A REFRESH OPERATION BASED ON A CHARACTERISTIC OF A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 17/339047 [patent_app_country] => US [patent_app_date] => 2021-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7302 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17339047 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/339047
Performing a refresh operation based on a characteristic of a memory sub-system Jun 3, 2021 Issued
Array ( [id] => 18061439 [patent_doc_number] => 20220392525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => PROGRAMMING DEVICES AND WEIGHTS IN HARDWARE [patent_app_type] => utility [patent_app_number] => 17/339046 [patent_app_country] => US [patent_app_date] => 2021-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17339046 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/339046
Programming devices and weights in hardware Jun 3, 2021 Issued
Array ( [id] => 18190430 [patent_doc_number] => 11581031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Memory with partial bank refresh [patent_app_type] => utility [patent_app_number] => 17/338191 [patent_app_country] => US [patent_app_date] => 2021-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 9442 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17338191 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/338191
Memory with partial bank refresh Jun 2, 2021 Issued
Array ( [id] => 18371649 [patent_doc_number] => 11651830 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => Low latency decoder for error correcting codes [patent_app_type] => utility [patent_app_number] => 17/337979 [patent_app_country] => US [patent_app_date] => 2021-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9304 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17337979 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/337979
Low latency decoder for error correcting codes Jun 2, 2021 Issued
Array ( [id] => 18061449 [patent_doc_number] => 20220392535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => Programming Intermediate State to Store Data in Self-Selecting Memory Cells [patent_app_type] => utility [patent_app_number] => 17/336913 [patent_app_country] => US [patent_app_date] => 2021-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13541 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17336913 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/336913
Programming intermediate state to store data in self-selecting memory cells Jun 1, 2021 Issued
Array ( [id] => 18061418 [patent_doc_number] => 20220392504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => LOW POWER MTJ-BASED ANALOG MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/336994 [patent_app_country] => US [patent_app_date] => 2021-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6768 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17336994 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/336994
Low power MTJ-based analog memory device Jun 1, 2021 Issued
Array ( [id] => 17566325 [patent_doc_number] => 20220130474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING IN A NONVOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 17/334045 [patent_app_country] => US [patent_app_date] => 2021-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15501 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17334045 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/334045
Nonvolatile memory device and method of programming in a nonvolatile memory May 27, 2021 Issued
Array ( [id] => 17188527 [patent_doc_number] => 20210335412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => UNDER-MEMORY ARRAY PROCESS EDGE MATS WITH SENSE AMPLIFIERS [patent_app_type] => utility [patent_app_number] => 17/332890 [patent_app_country] => US [patent_app_date] => 2021-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11304 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17332890 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/332890
Under-memory array process edge mats with sense amplifiers May 26, 2021 Issued
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