Search

Amber D. Steele

Examiner (ID: 5727, Phone: (571)272-5538 , Office: P/1676 )

Most Active Art Unit
1658
Art Unit(s)
1676, 1639, 1654, 1658
Total Applications
1273
Issued Applications
621
Pending Applications
157
Abandoned Applications
533

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17623356 [patent_doc_number] => 11342422 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-24 [patent_title] => Method of manufacturing semiconductor device and associated memory device [patent_app_type] => utility [patent_app_number] => 16/943858 [patent_app_country] => US [patent_app_date] => 2020-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 5826 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16943858 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/943858
Method of manufacturing semiconductor device and associated memory device Jul 29, 2020 Issued
Array ( [id] => 17683218 [patent_doc_number] => 11367479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-21 [patent_title] => SRAM structure and method [patent_app_type] => utility [patent_app_number] => 16/942278 [patent_app_country] => US [patent_app_date] => 2020-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 9251 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16942278 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/942278
SRAM structure and method Jul 28, 2020 Issued
Array ( [id] => 16676030 [patent_doc_number] => 20210064796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => SEB Resistance Evaluation Method and SEB Resistance Evaluation Device [patent_app_type] => utility [patent_app_number] => 16/933038 [patent_app_country] => US [patent_app_date] => 2020-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16933038 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/933038
SEB resistance evaluation method and SEB resistance evaluation device Jul 19, 2020 Issued
Array ( [id] => 16450153 [patent_doc_number] => 20200359579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => METHODS AND SYSTEMS FOR IRRIGATION CONTROL [patent_app_type] => utility [patent_app_number] => 16/933594 [patent_app_country] => US [patent_app_date] => 2020-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10854 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16933594 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/933594
Methods and systems for irrigation control Jul 19, 2020 Issued
Array ( [id] => 16424808 [patent_doc_number] => 20200350006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => JOSEPHSON MEMORY AND LOGIC CIRCUITS USING QUASI-LONG-JUNCTION INTERCONNECT [patent_app_type] => utility [patent_app_number] => 16/933356 [patent_app_country] => US [patent_app_date] => 2020-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7292 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16933356 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/933356
Josephson memory and logic circuits using quasi-long-junction interconnect Jul 19, 2020 Issued
Array ( [id] => 17623281 [patent_doc_number] => 11342345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-24 [patent_title] => Electronic device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/932315 [patent_app_country] => US [patent_app_date] => 2020-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 10936 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16932315 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/932315
Electronic device and method for fabricating the same Jul 16, 2020 Issued
Array ( [id] => 17607115 [patent_doc_number] => 11335607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Apparatus and methods for wafer to wafer bonding [patent_app_type] => utility [patent_app_number] => 16/924847 [patent_app_country] => US [patent_app_date] => 2020-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 12920 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16924847 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/924847
Apparatus and methods for wafer to wafer bonding Jul 8, 2020 Issued
Array ( [id] => 16811804 [patent_doc_number] => 20210134359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/922839 [patent_app_country] => US [patent_app_date] => 2020-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16922839 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/922839
Semiconductor memory device and method of operating the same Jul 6, 2020 Issued
Array ( [id] => 17318515 [patent_doc_number] => 20210407565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => DISTRIBUTED GROUPED TERMINATIONS FOR MULTIPLE MEMORY INTEGRATED CIRCUIT SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/916945 [patent_app_country] => US [patent_app_date] => 2020-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16916945 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/916945
Distributed grouped terminations for multiple memory integrated circuit systems Jun 29, 2020 Issued
Array ( [id] => 17558929 [patent_doc_number] => 11315648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Dynamic tier selection for program verify in nonvolatile memory [patent_app_type] => utility [patent_app_number] => 16/915663 [patent_app_country] => US [patent_app_date] => 2020-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 15025 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16915663 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/915663
Dynamic tier selection for program verify in nonvolatile memory Jun 28, 2020 Issued
Array ( [id] => 17239357 [patent_doc_number] => 11183245 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-11-23 [patent_title] => Pre-boosting scheme during a program operation in a memory sub-system [patent_app_type] => utility [patent_app_number] => 16/910789 [patent_app_country] => US [patent_app_date] => 2020-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10041 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16910789 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/910789
Pre-boosting scheme during a program operation in a memory sub-system Jun 23, 2020 Issued
Array ( [id] => 16363076 [patent_doc_number] => 20200319827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => TEMPERATURE CORRECTION IN MEMORY SUB-SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/909503 [patent_app_country] => US [patent_app_date] => 2020-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8591 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16909503 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/909503
Temperature correction in memory sub-systems Jun 22, 2020 Issued
Array ( [id] => 16826394 [patent_doc_number] => 20210141687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/909184 [patent_app_country] => US [patent_app_date] => 2020-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21937 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16909184 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/909184
Semiconductor devices and semiconductor systems including the same Jun 22, 2020 Issued
Array ( [id] => 17301533 [patent_doc_number] => 20210397372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => SYSTEM IDLE TIME REDUCTION METHODS AND APPARATUS [patent_app_type] => utility [patent_app_number] => 16/907411 [patent_app_country] => US [patent_app_date] => 2020-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14325 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16907411 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/907411
System idle time reduction methods and apparatus Jun 21, 2020 Issued
Array ( [id] => 17047814 [patent_doc_number] => 11101004 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-24 [patent_title] => Memory device and reading method [patent_app_type] => utility [patent_app_number] => 16/908328 [patent_app_country] => US [patent_app_date] => 2020-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3713 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16908328 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/908328
Memory device and reading method Jun 21, 2020 Issued
Array ( [id] => 16528497 [patent_doc_number] => 20200402578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => FLASH MEMORY AND METHOD FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/906406 [patent_app_country] => US [patent_app_date] => 2020-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16906406 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/906406
Flash memory and method for operating the same Jun 18, 2020 Issued
Array ( [id] => 17353014 [patent_doc_number] => 11227658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-18 [patent_title] => Flash memory and method for controlling the same [patent_app_type] => utility [patent_app_number] => 16/903714 [patent_app_country] => US [patent_app_date] => 2020-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4878 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16903714 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/903714
Flash memory and method for controlling the same Jun 16, 2020 Issued
Array ( [id] => 17469981 [patent_doc_number] => 11276463 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Matching patterns in memory arrays [patent_app_type] => utility [patent_app_number] => 16/902685 [patent_app_country] => US [patent_app_date] => 2020-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14215 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16902685 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/902685
Matching patterns in memory arrays Jun 15, 2020 Issued
Array ( [id] => 17295417 [patent_doc_number] => 20210391256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => E-Fuse with Dielectric Zipping [patent_app_type] => utility [patent_app_number] => 16/903213 [patent_app_country] => US [patent_app_date] => 2020-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16903213 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/903213
E-fuse with dielectric zipping Jun 15, 2020 Issued
Array ( [id] => 16896044 [patent_doc_number] => 11037605 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Power delivery circuitry [patent_app_type] => utility [patent_app_number] => 16/900096 [patent_app_country] => US [patent_app_date] => 2020-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 5284 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16900096 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/900096
Power delivery circuitry Jun 11, 2020 Issued
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