
Amelie R. Davis
Examiner (ID: 10149)
| Most Active Art Unit | 3793 |
| Art Unit(s) | 3798, 3793, 3737 |
| Total Applications | 502 |
| Issued Applications | 275 |
| Pending Applications | 93 |
| Abandoned Applications | 166 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4177381
[patent_doc_number] => 06158032
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-05
[patent_title] => 'Data processing system, circuit arrangement and program product including multi-path scan interface and methods thereof'
[patent_app_type] => 1
[patent_app_number] => 9/049170
[patent_app_country] => US
[patent_app_date] => 1998-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 8492
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/158/06158032.pdf
[firstpage_image] =>[orig_patent_app_number] => 049170
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/049170 | Data processing system, circuit arrangement and program product including multi-path scan interface and methods thereof | Mar 26, 1998 | Issued |
Array
(
[id] => 4261009
[patent_doc_number] => 06092232
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-18
[patent_title] => 'Disk data reproducing apparatus and disk data reproducing method'
[patent_app_type] => 1
[patent_app_number] => 9/042659
[patent_app_country] => US
[patent_app_date] => 1998-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 36
[patent_no_of_words] => 15042
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/092/06092232.pdf
[firstpage_image] =>[orig_patent_app_number] => 042659
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/042659 | Disk data reproducing apparatus and disk data reproducing method | Mar 16, 1998 | Issued |
Array
(
[id] => 4110856
[patent_doc_number] => 06134685
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-17
[patent_title] => 'Package parallel test method and apparatus'
[patent_app_type] => 1
[patent_app_number] => 9/039816
[patent_app_country] => US
[patent_app_date] => 1998-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3248
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/134/06134685.pdf
[firstpage_image] =>[orig_patent_app_number] => 039816
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/039816 | Package parallel test method and apparatus | Mar 15, 1998 | Issued |
Array
(
[id] => 4167917
[patent_doc_number] => 06065144
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-16
[patent_title] => 'Testing unit with testing information divided into redundancy-free information and redundancy information'
[patent_app_type] => 1
[patent_app_number] => 9/042442
[patent_app_country] => US
[patent_app_date] => 1998-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 4950
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/065/06065144.pdf
[firstpage_image] =>[orig_patent_app_number] => 042442
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/042442 | Testing unit with testing information divided into redundancy-free information and redundancy information | Mar 12, 1998 | Issued |
Array
(
[id] => 4239787
[patent_doc_number] => 06088821
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-11
[patent_title] => 'Logic circuit verification device for semiconductor integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 9/041798
[patent_app_country] => US
[patent_app_date] => 1998-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 6321
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 286
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/088/06088821.pdf
[firstpage_image] =>[orig_patent_app_number] => 041798
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/041798 | Logic circuit verification device for semiconductor integrated circuit | Mar 12, 1998 | Issued |
Array
(
[id] => 4257621
[patent_doc_number] => 06081914
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-27
[patent_title] => 'Method for implementing priority encoders using FPGA carry logic'
[patent_app_type] => 1
[patent_app_number] => 9/037749
[patent_app_country] => US
[patent_app_date] => 1998-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4887
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/081/06081914.pdf
[firstpage_image] =>[orig_patent_app_number] => 037749
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/037749 | Method for implementing priority encoders using FPGA carry logic | Mar 9, 1998 | Issued |
Array
(
[id] => 4089196
[patent_doc_number] => 06070258
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-30
[patent_title] => 'Logic synthesis for testability system which enables improvement in testability and effective selection of center state and logic synthesis method thereof'
[patent_app_type] => 1
[patent_app_number] => 9/035816
[patent_app_country] => US
[patent_app_date] => 1998-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 39
[patent_no_of_words] => 15660
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/070/06070258.pdf
[firstpage_image] =>[orig_patent_app_number] => 035816
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/035816 | Logic synthesis for testability system which enables improvement in testability and effective selection of center state and logic synthesis method thereof | Mar 5, 1998 | Issued |
Array
(
[id] => 4224569
[patent_doc_number] => 06079035
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-20
[patent_title] => 'Parallel data skew detecting circuit'
[patent_app_type] => 1
[patent_app_number] => 9/035924
[patent_app_country] => US
[patent_app_date] => 1998-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4959
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/079/06079035.pdf
[firstpage_image] =>[orig_patent_app_number] => 035924
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/035924 | Parallel data skew detecting circuit | Mar 5, 1998 | Issued |
Array
(
[id] => 4167970
[patent_doc_number] => 06065148
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-16
[patent_title] => 'Method for error detection and correction in a trip unit'
[patent_app_type] => 1
[patent_app_number] => 9/035192
[patent_app_country] => US
[patent_app_date] => 1998-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2308
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/065/06065148.pdf
[firstpage_image] =>[orig_patent_app_number] => 035192
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/035192 | Method for error detection and correction in a trip unit | Mar 4, 1998 | Issued |
Array
(
[id] => 4161429
[patent_doc_number] => 06061824
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-09
[patent_title] => 'Pipelined error correction for minimizing disk re-reading in hard drives'
[patent_app_type] => 1
[patent_app_number] => 9/035675
[patent_app_country] => US
[patent_app_date] => 1998-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3818
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/061/06061824.pdf
[firstpage_image] =>[orig_patent_app_number] => 035675
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/035675 | Pipelined error correction for minimizing disk re-reading in hard drives | Mar 4, 1998 | Issued |
Array
(
[id] => 4209720
[patent_doc_number] => 06154867
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-28
[patent_title] => 'Data-reproducing device'
[patent_app_type] => 1
[patent_app_number] => 9/034330
[patent_app_country] => US
[patent_app_date] => 1998-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 30
[patent_no_of_words] => 13564
[patent_no_of_claims] => 83
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/154/06154867.pdf
[firstpage_image] =>[orig_patent_app_number] => 034330
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/034330 | Data-reproducing device | Mar 3, 1998 | Issued |
Array
(
[id] => 4253020
[patent_doc_number] => 06076181
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-13
[patent_title] => 'Method and apparatus for controlling a retransmission/abort timer in a telecommunications system'
[patent_app_type] => 1
[patent_app_number] => 9/034196
[patent_app_country] => US
[patent_app_date] => 1998-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 4768
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/076/06076181.pdf
[firstpage_image] =>[orig_patent_app_number] => 034196
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/034196 | Method and apparatus for controlling a retransmission/abort timer in a telecommunications system | Mar 2, 1998 | Issued |
Array
(
[id] => 4200672
[patent_doc_number] => 06021517
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-01
[patent_title] => 'Storage device and storage subsystem for efficiently writing error correcting code'
[patent_app_type] => 1
[patent_app_number] => 9/034017
[patent_app_country] => US
[patent_app_date] => 1998-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 3760
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/021/06021517.pdf
[firstpage_image] =>[orig_patent_app_number] => 034017
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/034017 | Storage device and storage subsystem for efficiently writing error correcting code | Mar 1, 1998 | Issued |
Array
(
[id] => 4116809
[patent_doc_number] => 06067648
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-23
[patent_title] => 'Programmable pulse generator'
[patent_app_type] => 1
[patent_app_number] => 9/032968
[patent_app_country] => US
[patent_app_date] => 1998-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 24
[patent_no_of_words] => 24095
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/067/06067648.pdf
[firstpage_image] =>[orig_patent_app_number] => 032968
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/032968 | Programmable pulse generator | Mar 1, 1998 | Issued |
Array
(
[id] => 4089170
[patent_doc_number] => 06070256
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-30
[patent_title] => 'Method and apparatus for self-testing multi-port RAMs'
[patent_app_type] => 1
[patent_app_number] => 9/026339
[patent_app_country] => US
[patent_app_date] => 1998-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 5977
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/070/06070256.pdf
[firstpage_image] =>[orig_patent_app_number] => 026339
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/026339 | Method and apparatus for self-testing multi-port RAMs | Feb 18, 1998 | Issued |
Array
(
[id] => 4025787
[patent_doc_number] => 06006351
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-21
[patent_title] => 'Electronic communications system and method'
[patent_app_type] => 1
[patent_app_number] => 9/003203
[patent_app_country] => US
[patent_app_date] => 1998-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 24
[patent_no_of_words] => 14581
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/006/06006351.pdf
[firstpage_image] =>[orig_patent_app_number] => 003203
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/003203 | Electronic communications system and method | Jan 6, 1998 | Issued |
Array
(
[id] => 4423112
[patent_doc_number] => 06173424
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-09
[patent_title] => 'Programmable pulse generator and method for using same'
[patent_app_type] => 1
[patent_app_number] => 9/001264
[patent_app_country] => US
[patent_app_date] => 1997-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3137
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/173/06173424.pdf
[firstpage_image] =>[orig_patent_app_number] => 001264
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/001264 | Programmable pulse generator and method for using same | Dec 30, 1997 | Issued |
Array
(
[id] => 4226349
[patent_doc_number] => 06029268
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-22
[patent_title] => 'Quality calculator apparatus for use with Viterbi-decoded data using zero-state metrics'
[patent_app_type] => 1
[patent_app_number] => 9/000839
[patent_app_country] => US
[patent_app_date] => 1997-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2591
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/029/06029268.pdf
[firstpage_image] =>[orig_patent_app_number] => 000839
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/000839 | Quality calculator apparatus for use with Viterbi-decoded data using zero-state metrics | Dec 29, 1997 | Issued |
Array
(
[id] => 4212115
[patent_doc_number] => 06044484
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-28
[patent_title] => 'Method and circuit for error checking and correction in a decoding device of compact disc-read only memory drive'
[patent_app_type] => 1
[patent_app_number] => 8/992911
[patent_app_country] => US
[patent_app_date] => 1997-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5190
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/044/06044484.pdf
[firstpage_image] =>[orig_patent_app_number] => 992911
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/992911 | Method and circuit for error checking and correction in a decoding device of compact disc-read only memory drive | Dec 17, 1997 | Issued |
Array
(
[id] => 4281564
[patent_doc_number] => 06260163
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-10
[patent_title] => 'Testing high I/O integrated circuits on a low I/O tester'
[patent_app_type] => 1
[patent_app_number] => 8/989551
[patent_app_country] => US
[patent_app_date] => 1997-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3025
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/260/06260163.pdf
[firstpage_image] =>[orig_patent_app_number] => 989551
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/989551 | Testing high I/O integrated circuits on a low I/O tester | Dec 11, 1997 | Issued |