Search

Amelie R. Davis

Examiner (ID: 10149)

Most Active Art Unit
3793
Art Unit(s)
3798, 3793, 3737
Total Applications
502
Issued Applications
275
Pending Applications
93
Abandoned Applications
166

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4166225 [patent_doc_number] => 06065031 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Log converter utilizing offset and method of use thereof' [patent_app_type] => 1 [patent_app_number] => 8/853616 [patent_app_country] => US [patent_app_date] => 1997-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2869 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/065/06065031.pdf [firstpage_image] =>[orig_patent_app_number] => 853616 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/853616
Log converter utilizing offset and method of use thereof May 8, 1997 Issued
Array ( [id] => 4426990 [patent_doc_number] => 06195772 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Electronic circuit testing methods and apparatus' [patent_app_type] => 1 [patent_app_number] => 8/850790 [patent_app_country] => US [patent_app_date] => 1997-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5798 [patent_no_of_claims] => 69 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/195/06195772.pdf [firstpage_image] =>[orig_patent_app_number] => 850790 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/850790
Electronic circuit testing methods and apparatus May 1, 1997 Issued
Array ( [id] => 3884024 [patent_doc_number] => 05838697 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Bit error counting method and counting technical field' [patent_app_type] => 1 [patent_app_number] => 8/848236 [patent_app_country] => US [patent_app_date] => 1997-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7389 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838697.pdf [firstpage_image] =>[orig_patent_app_number] => 848236 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/848236
Bit error counting method and counting technical field Apr 28, 1997 Issued
Array ( [id] => 4122904 [patent_doc_number] => 06052819 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'System and method for detecting correcting and discarding corrupted data packets in a cable data delivery system' [patent_app_type] => 1 [patent_app_number] => 8/835966 [patent_app_country] => US [patent_app_date] => 1997-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8791 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/052/06052819.pdf [firstpage_image] =>[orig_patent_app_number] => 835966 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/835966
System and method for detecting correcting and discarding corrupted data packets in a cable data delivery system Apr 10, 1997 Issued
Array ( [id] => 4216176 [patent_doc_number] => 06014767 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-11 [patent_title] => 'Method and apparatus for a simple calculation of CRC-10' [patent_app_type] => 1 [patent_app_number] => 8/834678 [patent_app_country] => US [patent_app_date] => 1997-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3873 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/014/06014767.pdf [firstpage_image] =>[orig_patent_app_number] => 834678 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/834678
Method and apparatus for a simple calculation of CRC-10 Mar 31, 1997 Issued
08/750726 ERROR CORRECTION IN A MEMORY Mar 27, 1997 Abandoned
Array ( [id] => 4204277 [patent_doc_number] => 06161209 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Joint detector for multiple coded digital signals' [patent_app_type] => 1 [patent_app_number] => 8/827533 [patent_app_country] => US [patent_app_date] => 1997-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 65 [patent_no_of_words] => 29241 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/161/06161209.pdf [firstpage_image] =>[orig_patent_app_number] => 827533 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/827533
Joint detector for multiple coded digital signals Mar 27, 1997 Issued
Array ( [id] => 4209492 [patent_doc_number] => 06154853 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Method and apparatus for dynamic sparing in a RAID storage system' [patent_app_type] => 1 [patent_app_number] => 8/825164 [patent_app_country] => US [patent_app_date] => 1997-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4021 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/154/06154853.pdf [firstpage_image] =>[orig_patent_app_number] => 825164 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/825164
Method and apparatus for dynamic sparing in a RAID storage system Mar 25, 1997 Issued
Array ( [id] => 4177864 [patent_doc_number] => 06105153 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Semiconductor integrated circuit and its evaluating method' [patent_app_type] => 1 [patent_app_number] => 8/827070 [patent_app_country] => US [patent_app_date] => 1997-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 4621 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/105/06105153.pdf [firstpage_image] =>[orig_patent_app_number] => 827070 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/827070
Semiconductor integrated circuit and its evaluating method Mar 25, 1997 Issued
Array ( [id] => 4027053 [patent_doc_number] => 05907499 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-25 [patent_title] => 'Hardware implemented divider for binary numbers using a redundant binary representation' [patent_app_type] => 1 [patent_app_number] => 8/821777 [patent_app_country] => US [patent_app_date] => 1997-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 11297 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/907/05907499.pdf [firstpage_image] =>[orig_patent_app_number] => 821777 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/821777
Hardware implemented divider for binary numbers using a redundant binary representation Mar 19, 1997 Issued
Array ( [id] => 4020619 [patent_doc_number] => 05889795 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Disk array system and method for storing data' [patent_app_type] => 1 [patent_app_number] => 8/815265 [patent_app_country] => US [patent_app_date] => 1997-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4853 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/889/05889795.pdf [firstpage_image] =>[orig_patent_app_number] => 815265 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/815265
Disk array system and method for storing data Mar 9, 1997 Issued
Array ( [id] => 3969401 [patent_doc_number] => 05957998 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Discrete cosine transform method' [patent_app_type] => 1 [patent_app_number] => 8/812761 [patent_app_country] => US [patent_app_date] => 1997-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2744 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/957/05957998.pdf [firstpage_image] =>[orig_patent_app_number] => 812761 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/812761
Discrete cosine transform method Mar 5, 1997 Issued
Array ( [id] => 4020547 [patent_doc_number] => 05889790 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Data communication method and data communication apparatus' [patent_app_type] => 1 [patent_app_number] => 8/811158 [patent_app_country] => US [patent_app_date] => 1997-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 15384 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/889/05889790.pdf [firstpage_image] =>[orig_patent_app_number] => 811158 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/811158
Data communication method and data communication apparatus Mar 3, 1997 Issued
Array ( [id] => 3754672 [patent_doc_number] => 05754564 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Method of continuous calculation of cyclic redundancy check' [patent_app_type] => 1 [patent_app_number] => 8/811235 [patent_app_country] => US [patent_app_date] => 1997-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2609 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754564.pdf [firstpage_image] =>[orig_patent_app_number] => 811235 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/811235
Method of continuous calculation of cyclic redundancy check Mar 2, 1997 Issued
Array ( [id] => 4426987 [patent_doc_number] => 06195771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Semiconductor device having semiconductor memory circuit to be tested, method of testing semiconductor memory circuit and read circuit for semiconductor memory circuit' [patent_app_type] => 1 [patent_app_number] => 8/807462 [patent_app_country] => US [patent_app_date] => 1997-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 30 [patent_no_of_words] => 20504 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/195/06195771.pdf [firstpage_image] =>[orig_patent_app_number] => 807462 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/807462
Semiconductor device having semiconductor memory circuit to be tested, method of testing semiconductor memory circuit and read circuit for semiconductor memory circuit Feb 26, 1997 Issued
Array ( [id] => 4046259 [patent_doc_number] => 05856987 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-05 [patent_title] => 'Encoder and decoder for an SEC-DED-S4ED rotational code' [patent_app_type] => 1 [patent_app_number] => 8/801617 [patent_app_country] => US [patent_app_date] => 1997-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 3494 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/856/05856987.pdf [firstpage_image] =>[orig_patent_app_number] => 801617 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/801617
Encoder and decoder for an SEC-DED-S4ED rotational code Feb 17, 1997 Issued
Array ( [id] => 4025835 [patent_doc_number] => 06006354 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Security device for a video digital to analog converter' [patent_app_type] => 1 [patent_app_number] => 8/797966 [patent_app_country] => US [patent_app_date] => 1997-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4982 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/006/06006354.pdf [firstpage_image] =>[orig_patent_app_number] => 797966 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/797966
Security device for a video digital to analog converter Feb 11, 1997 Issued
Array ( [id] => 3923802 [patent_doc_number] => 05928376 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Process for receiving a signal coded and modulated according to an ETS-HIPERLAN standard' [patent_app_type] => 1 [patent_app_number] => 8/797624 [patent_app_country] => US [patent_app_date] => 1997-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1974 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/928/05928376.pdf [firstpage_image] =>[orig_patent_app_number] => 797624 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/797624
Process for receiving a signal coded and modulated according to an ETS-HIPERLAN standard Feb 6, 1997 Issued
Array ( [id] => 3925288 [patent_doc_number] => 05988872 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Sector data decoding method and circuit in a CD-ROM drive' [patent_app_type] => 1 [patent_app_number] => 8/791145 [patent_app_country] => US [patent_app_date] => 1997-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2106 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/988/05988872.pdf [firstpage_image] =>[orig_patent_app_number] => 791145 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/791145
Sector data decoding method and circuit in a CD-ROM drive Jan 29, 1997 Issued
Array ( [id] => 3969409 [patent_doc_number] => 05948117 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-07 [patent_title] => 'Modified Reed-Solomon error correction system using (W+i+1)-bit representations of symbols of GF(2.sup.w+i)' [patent_app_type] => 1 [patent_app_number] => 8/786894 [patent_app_country] => US [patent_app_date] => 1997-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6388 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/948/05948117.pdf [firstpage_image] =>[orig_patent_app_number] => 786894 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/786894
Modified Reed-Solomon error correction system using (W+i+1)-bit representations of symbols of GF(2.sup.w+i) Jan 22, 1997 Issued
Menu