
Amelie R. Davis
Examiner (ID: 10149)
| Most Active Art Unit | 3793 |
| Art Unit(s) | 3798, 3793, 3737 |
| Total Applications | 502 |
| Issued Applications | 275 |
| Pending Applications | 93 |
| Abandoned Applications | 166 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3732927
[patent_doc_number] => 05673214
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-30
[patent_title] => 'Discrete cosine transform processor'
[patent_app_type] => 1
[patent_app_number] => 8/704922
[patent_app_country] => US
[patent_app_date] => 1996-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 7750
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/673/05673214.pdf
[firstpage_image] =>[orig_patent_app_number] => 704922
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/704922 | Discrete cosine transform processor | Aug 27, 1996 | Issued |
Array
(
[id] => 4121178
[patent_doc_number] => 06052705
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-18
[patent_title] => 'Video signal processor with triple port memory'
[patent_app_type] => 1
[patent_app_number] => 8/701880
[patent_app_country] => US
[patent_app_date] => 1996-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 9783
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/052/06052705.pdf
[firstpage_image] =>[orig_patent_app_number] => 701880
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/701880 | Video signal processor with triple port memory | Aug 22, 1996 | Issued |
Array
(
[id] => 3741745
[patent_doc_number] => 05694346
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-02
[patent_title] => 'Integrated circuit including fully testable small scale read only memory constructed of level sensitive scan device shift register latches'
[patent_app_type] => 1
[patent_app_number] => 8/701037
[patent_app_country] => US
[patent_app_date] => 1996-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2434
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 278
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/694/05694346.pdf
[firstpage_image] =>[orig_patent_app_number] => 701037
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/701037 | Integrated circuit including fully testable small scale read only memory constructed of level sensitive scan device shift register latches | Aug 20, 1996 | Issued |
Array
(
[id] => 4026805
[patent_doc_number] => 05880978
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-09
[patent_title] => 'Method and apparatus for creating an output vector from an input vector'
[patent_app_type] => 1
[patent_app_number] => 8/700008
[patent_app_country] => US
[patent_app_date] => 1996-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2828
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/880/05880978.pdf
[firstpage_image] =>[orig_patent_app_number] => 700008
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/700008 | Method and apparatus for creating an output vector from an input vector | Aug 19, 1996 | Issued |
| 08/698075 | PARALLEL INPUT ECC ENCODER AND ASSOCIATED METHOD OF REMAINDER COMPUTATION | Aug 14, 1996 | Abandoned |
Array
(
[id] => 4004784
[patent_doc_number] => 05892701
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-06
[patent_title] => 'Silicon filtering buffer apparatus and the method of operation thereof'
[patent_app_type] => 1
[patent_app_number] => 8/696797
[patent_app_country] => US
[patent_app_date] => 1996-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 4910
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/892/05892701.pdf
[firstpage_image] =>[orig_patent_app_number] => 696797
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/696797 | Silicon filtering buffer apparatus and the method of operation thereof | Aug 13, 1996 | Issued |
Array
(
[id] => 4020564
[patent_doc_number] => 05889791
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-30
[patent_title] => 'System, device and method of FEC coding and interleaving for variable length burst transmission'
[patent_app_type] => 1
[patent_app_number] => 8/696446
[patent_app_country] => US
[patent_app_date] => 1996-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 5768
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/889/05889791.pdf
[firstpage_image] =>[orig_patent_app_number] => 696446
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/696446 | System, device and method of FEC coding and interleaving for variable length burst transmission | Aug 12, 1996 | Issued |
Array
(
[id] => 4026847
[patent_doc_number] => 05880981
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-09
[patent_title] => 'Method and apparatus for reducing the power consumption in a programmable digital signal processor'
[patent_app_type] => 1
[patent_app_number] => 8/695617
[patent_app_country] => US
[patent_app_date] => 1996-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 5341
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/880/05880981.pdf
[firstpage_image] =>[orig_patent_app_number] => 695617
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/695617 | Method and apparatus for reducing the power consumption in a programmable digital signal processor | Aug 11, 1996 | Issued |
Array
(
[id] => 3915322
[patent_doc_number] => 05951623
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-14
[patent_title] => 'Lempel- Ziv data compression technique utilizing a dictionary pre-filled with frequent letter combinations, words and/or phrases'
[patent_app_type] => 1
[patent_app_number] => 8/692474
[patent_app_country] => US
[patent_app_date] => 1996-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 16535
[patent_no_of_claims] => 68
[patent_no_of_ind_claims] => 17
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/951/05951623.pdf
[firstpage_image] =>[orig_patent_app_number] => 692474
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/692474 | Lempel- Ziv data compression technique utilizing a dictionary pre-filled with frequent letter combinations, words and/or phrases | Aug 5, 1996 | Issued |
Array
(
[id] => 4056522
[patent_doc_number] => 05995991
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-30
[patent_title] => 'Floating point architecture with tagged operands'
[patent_app_type] => 1
[patent_app_number] => 8/677551
[patent_app_country] => US
[patent_app_date] => 1996-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 4785
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/995/05995991.pdf
[firstpage_image] =>[orig_patent_app_number] => 677551
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/677551 | Floating point architecture with tagged operands | Jul 17, 1996 | Issued |
Array
(
[id] => 3791737
[patent_doc_number] => 05818740
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-06
[patent_title] => 'Decimator for use with a modem with time invariant echo path'
[patent_app_type] => 1
[patent_app_number] => 8/679537
[patent_app_country] => US
[patent_app_date] => 1996-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 10051
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/818/05818740.pdf
[firstpage_image] =>[orig_patent_app_number] => 679537
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/679537 | Decimator for use with a modem with time invariant echo path | Jul 11, 1996 | Issued |
Array
(
[id] => 3804302
[patent_doc_number] => 05726924
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-10
[patent_title] => 'Exponentiation circuit utilizing shift means and method of using same'
[patent_app_type] => 1
[patent_app_number] => 8/680282
[patent_app_country] => US
[patent_app_date] => 1996-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 9115
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 30
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/726/05726924.pdf
[firstpage_image] =>[orig_patent_app_number] => 680282
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/680282 | Exponentiation circuit utilizing shift means and method of using same | Jul 10, 1996 | Issued |
Array
(
[id] => 4054329
[patent_doc_number] => 05875120
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-23
[patent_title] => 'Information processing system'
[patent_app_type] => 1
[patent_app_number] => 8/676580
[patent_app_country] => US
[patent_app_date] => 1996-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 8165
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 301
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/875/05875120.pdf
[firstpage_image] =>[orig_patent_app_number] => 676580
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/676580 | Information processing system | Jun 30, 1996 | Issued |
Array
(
[id] => 4380298
[patent_doc_number] => 06256654
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-03
[patent_title] => 'Signal interpolation and decimation exploiting filter symmetry'
[patent_app_type] => 1
[patent_app_number] => 8/672531
[patent_app_country] => US
[patent_app_date] => 1996-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 10950
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/256/06256654.pdf
[firstpage_image] =>[orig_patent_app_number] => 672531
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/672531 | Signal interpolation and decimation exploiting filter symmetry | Jun 30, 1996 | Issued |
Array
(
[id] => 3807516
[patent_doc_number] => 05781460
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-14
[patent_title] => 'System and method for chaotic signal identification'
[patent_app_type] => 1
[patent_app_number] => 8/682896
[patent_app_country] => US
[patent_app_date] => 1996-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5021
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/781/05781460.pdf
[firstpage_image] =>[orig_patent_app_number] => 682896
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/682896 | System and method for chaotic signal identification | Jun 27, 1996 | Issued |
Array
(
[id] => 4016043
[patent_doc_number] => 05859861
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-12
[patent_title] => 'High speed viterbi decoder'
[patent_app_type] => 1
[patent_app_number] => 8/672076
[patent_app_country] => US
[patent_app_date] => 1996-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 17
[patent_no_of_words] => 7693
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/859/05859861.pdf
[firstpage_image] =>[orig_patent_app_number] => 672076
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/672076 | High speed viterbi decoder | Jun 25, 1996 | Issued |
Array
(
[id] => 1593331
[patent_doc_number] => 06483695
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-11-19
[patent_title] => 'Computer/keyboard built into refrigerator door'
[patent_app_type] => B1
[patent_app_number] => 08/671114
[patent_app_country] => US
[patent_app_date] => 1996-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2860
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/483/06483695.pdf
[firstpage_image] =>[orig_patent_app_number] => 08671114
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/671114 | Computer/keyboard built into refrigerator door | Jun 23, 1996 | Issued |
Array
(
[id] => 3844904
[patent_doc_number] => 05740186
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-14
[patent_title] => 'Apparatus and method for error correction based on transmission code violations and parity'
[patent_app_type] => 1
[patent_app_number] => 8/663433
[patent_app_country] => US
[patent_app_date] => 1996-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 12765
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/740/05740186.pdf
[firstpage_image] =>[orig_patent_app_number] => 663433
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/663433 | Apparatus and method for error correction based on transmission code violations and parity | Jun 12, 1996 | Issued |
Array
(
[id] => 3825963
[patent_doc_number] => 05771182
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-23
[patent_title] => 'Bit-serial digital compressor'
[patent_app_type] => 1
[patent_app_number] => 8/659104
[patent_app_country] => US
[patent_app_date] => 1996-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 6455
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/771/05771182.pdf
[firstpage_image] =>[orig_patent_app_number] => 659104
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/659104 | Bit-serial digital compressor | May 30, 1996 | Issued |
Array
(
[id] => 4132313
[patent_doc_number] => 06047301
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-04
[patent_title] => 'Wearable computer'
[patent_app_type] => 1
[patent_app_number] => 8/653217
[patent_app_country] => US
[patent_app_date] => 1996-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 3318
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/047/06047301.pdf
[firstpage_image] =>[orig_patent_app_number] => 653217
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/653217 | Wearable computer | May 23, 1996 | Issued |