
Amelie R. Davis
Examiner (ID: 10149)
| Most Active Art Unit | 3793 |
| Art Unit(s) | 3798, 3793, 3737 |
| Total Applications | 502 |
| Issued Applications | 275 |
| Pending Applications | 93 |
| Abandoned Applications | 166 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3679457
[patent_doc_number] => 05600660
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-04
[patent_title] => 'Method for determining the number of defective digital bits (defective bit number) transmitted over a data-transmission path to be tested, and device for the carrying out of the method'
[patent_app_type] => 1
[patent_app_number] => 8/290916
[patent_app_country] => US
[patent_app_date] => 1994-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3579
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/600/05600660.pdf
[firstpage_image] =>[orig_patent_app_number] => 290916
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/290916 | Method for determining the number of defective digital bits (defective bit number) transmitted over a data-transmission path to be tested, and device for the carrying out of the method | Oct 17, 1994 | Issued |
Array
(
[id] => 3452142
[patent_doc_number] => 05467297
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-14
[patent_title] => 'Finite field inversion'
[patent_app_type] => 1
[patent_app_number] => 8/325831
[patent_app_country] => US
[patent_app_date] => 1994-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 7112
[patent_no_of_claims] => 39
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[patent_words_short_claim] => 143
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/467/05467297.pdf
[firstpage_image] =>[orig_patent_app_number] => 325831
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/325831 | Finite field inversion | Oct 17, 1994 | Issued |
Array
(
[id] => 3639747
[patent_doc_number] => 05687184
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-11
[patent_title] => 'Method and circuit arrangement for speech signal transmission'
[patent_app_type] => 1
[patent_app_number] => 8/323205
[patent_app_country] => US
[patent_app_date] => 1994-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 9610
[patent_no_of_claims] => 15
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[patent_words_short_claim] => 109
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[pdf_file] => patents/05/687/05687184.pdf
[firstpage_image] =>[orig_patent_app_number] => 323205
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/323205 | Method and circuit arrangement for speech signal transmission | Oct 13, 1994 | Issued |
Array
(
[id] => 3502151
[patent_doc_number] => 05537345
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-16
[patent_title] => 'Mathematical function processor utilizing table information'
[patent_app_type] => 1
[patent_app_number] => 8/322537
[patent_app_country] => US
[patent_app_date] => 1994-10-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 34
[patent_no_of_words] => 13439
[patent_no_of_claims] => 16
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[pdf_file] => patents/05/537/05537345.pdf
[firstpage_image] =>[orig_patent_app_number] => 322537
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/322537 | Mathematical function processor utilizing table information | Oct 12, 1994 | Issued |
Array
(
[id] => 3560197
[patent_doc_number] => 05548600
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-20
[patent_title] => 'Method and means for generating and detecting spectrally constrained coded partial response waveforms using a time varying trellis modified by selective output state splitting'
[patent_app_type] => 1
[patent_app_number] => 8/316597
[patent_app_country] => US
[patent_app_date] => 1994-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_no_of_words] => 5756
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/548/05548600.pdf
[firstpage_image] =>[orig_patent_app_number] => 316597
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/316597 | Method and means for generating and detecting spectrally constrained coded partial response waveforms using a time varying trellis modified by selective output state splitting | Sep 28, 1994 | Issued |
Array
(
[id] => 3622339
[patent_doc_number] => 05566099
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-15
[patent_title] => 'Pseudorandom number generator'
[patent_app_type] => 1
[patent_app_number] => 8/310998
[patent_app_country] => US
[patent_app_date] => 1994-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/566/05566099.pdf
[firstpage_image] =>[orig_patent_app_number] => 310998
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/310998 | Pseudorandom number generator | Sep 21, 1994 | Issued |
Array
(
[id] => 3558151
[patent_doc_number] => 05555516
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-10
[patent_title] => 'Multipurpose error correction calculation circuit'
[patent_app_type] => 1
[patent_app_number] => 8/306918
[patent_app_country] => US
[patent_app_date] => 1994-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 21
[patent_no_of_words] => 16436
[patent_no_of_claims] => 103
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/555/05555516.pdf
[firstpage_image] =>[orig_patent_app_number] => 306918
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/306918 | Multipurpose error correction calculation circuit | Sep 15, 1994 | Issued |
Array
(
[id] => 3668970
[patent_doc_number] => 05592404
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-07
[patent_title] => 'Versatile error correction system'
[patent_app_type] => 1
[patent_app_number] => 8/307259
[patent_app_country] => US
[patent_app_date] => 1994-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 24
[patent_no_of_words] => 16170
[patent_no_of_claims] => 73
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[pdf_file] => patents/05/592/05592404.pdf
[firstpage_image] =>[orig_patent_app_number] => 307259
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/307259 | Versatile error correction system | Sep 15, 1994 | Issued |
Array
(
[id] => 3670423
[patent_doc_number] => 05592498
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-07
[patent_title] => 'CRC/EDC checker system'
[patent_app_type] => 1
[patent_app_number] => 8/306917
[patent_app_country] => US
[patent_app_date] => 1994-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 5613
[patent_no_of_claims] => 36
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/592/05592498.pdf
[firstpage_image] =>[orig_patent_app_number] => 306917
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/306917 | CRC/EDC checker system | Sep 15, 1994 | Issued |
Array
(
[id] => 3527797
[patent_doc_number] => 05577054
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-19
[patent_title] => 'Device and method for performing error detection on an interleaved signal portion, and a receiver and decoding method employing such error detection'
[patent_app_type] => 1
[patent_app_number] => 8/305114
[patent_app_country] => US
[patent_app_date] => 1994-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 8608
[patent_no_of_claims] => 30
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/577/05577054.pdf
[firstpage_image] =>[orig_patent_app_number] => 305114
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/305114 | Device and method for performing error detection on an interleaved signal portion, and a receiver and decoding method employing such error detection | Sep 12, 1994 | Issued |
Array
(
[id] => 3832284
[patent_doc_number] => 05790566
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-04
[patent_title] => 'Method and device for depuncturing data'
[patent_app_type] => 1
[patent_app_number] => 8/298627
[patent_app_country] => US
[patent_app_date] => 1994-08-31
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/790/05790566.pdf
[firstpage_image] =>[orig_patent_app_number] => 298627
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/298627 | Method and device for depuncturing data | Aug 30, 1994 | Issued |
Array
(
[id] => 3590940
[patent_doc_number] => 05499254
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-03-12
[patent_title] => 'Apparatus for error-correct decoding in a digital data communications system'
[patent_app_type] => 1
[patent_app_number] => 8/299237
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[pdf_file] => patents/05/499/05499254.pdf
[firstpage_image] =>[orig_patent_app_number] => 299237
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/299237 | Apparatus for error-correct decoding in a digital data communications system | Aug 30, 1994 | Issued |
Array
(
[id] => 3600283
[patent_doc_number] => 05586071
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-17
[patent_title] => 'Enhanced fast multiplier'
[patent_app_type] => 1
[patent_app_number] => 8/296845
[patent_app_country] => US
[patent_app_date] => 1994-08-26
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 296845
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/296845 | Enhanced fast multiplier | Aug 25, 1994 | Issued |
Array
(
[id] => 3562872
[patent_doc_number] => 05574670
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-12
[patent_title] => 'Apparatus and method for determining a number of digits leading a particular digit'
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[patent_app_number] => 8/295347
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[pdf_file] => patents/05/574/05574670.pdf
[firstpage_image] =>[orig_patent_app_number] => 295347
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/295347 | Apparatus and method for determining a number of digits leading a particular digit | Aug 23, 1994 | Issued |
| 08/295255 | METHOD OF CONTINUOUS CALCULATION OF CYCLIC REDUNDANCY CHECK | Aug 23, 1994 | Abandoned |
Array
(
[id] => 3515294
[patent_doc_number] => 05515303
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[patent_kind] => NA
[patent_issue_date] => 1996-05-07
[patent_title] => 'Hand-held computerized data collection terminal with rechargeable battery pack sensor and battery power conservation'
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[firstpage_image] =>[orig_patent_app_number] => 289322
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/289322 | Hand-held computerized data collection terminal with rechargeable battery pack sensor and battery power conservation | Aug 10, 1994 | Issued |
Array
(
[id] => 3559287
[patent_doc_number] => 05548541
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-20
[patent_title] => 'Finite impulse response filter for modulator in digital data transmission system'
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[patent_app_number] => 8/287208
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[pdf_file] => patents/05/548/05548541.pdf
[firstpage_image] =>[orig_patent_app_number] => 287208
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/287208 | Finite impulse response filter for modulator in digital data transmission system | Aug 7, 1994 | Issued |
Array
(
[id] => 3664339
[patent_doc_number] => 05623434
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-22
[patent_title] => 'Structure and method of using an arithmetic and logic unit for carry propagation stage of a multiplier'
[patent_app_type] => 1
[patent_app_number] => 8/281377
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/281377 | Structure and method of using an arithmetic and logic unit for carry propagation stage of a multiplier | Jul 26, 1994 | Issued |
Array
(
[id] => 3529752
[patent_doc_number] => 05530662
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[patent_issue_date] => 1996-06-25
[patent_title] => 'Fixed point signal processor having block floating processing circuitry'
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[firstpage_image] =>[orig_patent_app_number] => 280987
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/280987 | Fixed point signal processor having block floating processing circuitry | Jul 26, 1994 | Issued |
Array
(
[id] => 3563440
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[patent_kind] => NA
[patent_issue_date] => 1996-05-21
[patent_title] => 'Inverse discrete cosine transformer'
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[firstpage_image] =>[orig_patent_app_number] => 276237
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/276237 | Inverse discrete cosine transformer | Jul 17, 1994 | Issued |