
Amelie R. Davis
Examiner (ID: 10149)
| Most Active Art Unit | 3793 |
| Art Unit(s) | 3798, 3793, 3737 |
| Total Applications | 502 |
| Issued Applications | 275 |
| Pending Applications | 93 |
| Abandoned Applications | 166 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3583448
[patent_doc_number] => 05539756
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-23
[patent_title] => 'Method to ensure data integrity in a telecommunications network'
[patent_app_type] => 1
[patent_app_number] => 8/205677
[patent_app_country] => US
[patent_app_date] => 1994-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3116
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 26
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/539/05539756.pdf
[firstpage_image] =>[orig_patent_app_number] => 205677
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/205677 | Method to ensure data integrity in a telecommunications network | Mar 2, 1994 | Issued |
Array
(
[id] => 3600695
[patent_doc_number] => 05488576
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-30
[patent_title] => 'Amplitude adaptive filter'
[patent_app_type] => 1
[patent_app_number] => 8/199097
[patent_app_country] => US
[patent_app_date] => 1994-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 6765
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/488/05488576.pdf
[firstpage_image] =>[orig_patent_app_number] => 199097
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/199097 | Amplitude adaptive filter | Feb 21, 1994 | Issued |
Array
(
[id] => 3499636
[patent_doc_number] => 05440504
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-08
[patent_title] => 'Arithmetic apparatus for digital signal processor'
[patent_app_type] => 1
[patent_app_number] => 8/198640
[patent_app_country] => US
[patent_app_date] => 1994-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 7694
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/440/05440504.pdf
[firstpage_image] =>[orig_patent_app_number] => 198640
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/198640 | Arithmetic apparatus for digital signal processor | Feb 17, 1994 | Issued |
Array
(
[id] => 3499624
[patent_doc_number] => 05440503
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-08
[patent_title] => 'Digital filtering circuit operable as a three-stage moving average filter'
[patent_app_type] => 1
[patent_app_number] => 8/196532
[patent_app_country] => US
[patent_app_date] => 1994-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6754
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 272
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/440/05440503.pdf
[firstpage_image] =>[orig_patent_app_number] => 196532
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/196532 | Digital filtering circuit operable as a three-stage moving average filter | Feb 14, 1994 | Issued |
Array
(
[id] => 3120313
[patent_doc_number] => 05465222
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-07
[patent_title] => 'Barrel shifter or multiply/divide IC structure'
[patent_app_type] => 1
[patent_app_number] => 8/195428
[patent_app_country] => US
[patent_app_date] => 1994-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1554
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 284
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/465/05465222.pdf
[firstpage_image] =>[orig_patent_app_number] => 195428
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/195428 | Barrel shifter or multiply/divide IC structure | Feb 13, 1994 | Issued |
Array
(
[id] => 3530272
[patent_doc_number] => 05490101
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-06
[patent_title] => 'Digital data multiplying circuit'
[patent_app_type] => 1
[patent_app_number] => 8/195007
[patent_app_country] => US
[patent_app_date] => 1994-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 26
[patent_no_of_words] => 3534
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/490/05490101.pdf
[firstpage_image] =>[orig_patent_app_number] => 195007
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/195007 | Digital data multiplying circuit | Feb 13, 1994 | Issued |
Array
(
[id] => 3588081
[patent_doc_number] => 05491651
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-13
[patent_title] => 'Flexible wearable computer'
[patent_app_type] => 1
[patent_app_number] => 8/192636
[patent_app_country] => US
[patent_app_date] => 1994-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 29
[patent_no_of_words] => 6055
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/491/05491651.pdf
[firstpage_image] =>[orig_patent_app_number] => 192636
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/192636 | Flexible wearable computer | Feb 6, 1994 | Issued |
| 08/188068 | METHOD FOR FINDING QUOTIENT IN A DIGITAL SYSTEM | Jan 25, 1994 | Abandoned |
Array
(
[id] => 3547513
[patent_doc_number] => 05495488
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-27
[patent_title] => 'Arithmetic circuit having a simple structure for producing an error numeric value polynomial and an error locator polynomial'
[patent_app_type] => 1
[patent_app_number] => 8/186574
[patent_app_country] => US
[patent_app_date] => 1994-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 5822
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 299
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/495/05495488.pdf
[firstpage_image] =>[orig_patent_app_number] => 186574
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/186574 | Arithmetic circuit having a simple structure for producing an error numeric value polynomial and an error locator polynomial | Jan 25, 1994 | Issued |
Array
(
[id] => 3599541
[patent_doc_number] => 05517512
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-14
[patent_title] => 'Cyclic coding and cyclic redundancy code check processor'
[patent_app_type] => 1
[patent_app_number] => 8/186154
[patent_app_country] => US
[patent_app_date] => 1994-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 6650
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 247
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/517/05517512.pdf
[firstpage_image] =>[orig_patent_app_number] => 186154
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/186154 | Cyclic coding and cyclic redundancy code check processor | Jan 24, 1994 | Issued |
Array
(
[id] => 3712325
[patent_doc_number] => 05646872
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-08
[patent_title] => 'Information processing apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/186708
[patent_app_country] => US
[patent_app_date] => 1994-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 15
[patent_no_of_words] => 7907
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/646/05646872.pdf
[firstpage_image] =>[orig_patent_app_number] => 186708
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/186708 | Information processing apparatus | Jan 24, 1994 | Issued |
Array
(
[id] => 3671291
[patent_doc_number] => 05657259
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-12
[patent_title] => 'Number formatting framework'
[patent_app_type] => 1
[patent_app_number] => 8/184127
[patent_app_country] => US
[patent_app_date] => 1994-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7357
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/657/05657259.pdf
[firstpage_image] =>[orig_patent_app_number] => 184127
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/184127 | Number formatting framework | Jan 20, 1994 | Issued |
Array
(
[id] => 3467241
[patent_doc_number] => 05473558
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-05
[patent_title] => 'Method for generating hardware description of multiplier and/or multiplier-adder'
[patent_app_type] => 1
[patent_app_number] => 8/184628
[patent_app_country] => US
[patent_app_date] => 1994-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 21
[patent_no_of_words] => 3811
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/473/05473558.pdf
[firstpage_image] =>[orig_patent_app_number] => 184628
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/184628 | Method for generating hardware description of multiplier and/or multiplier-adder | Jan 20, 1994 | Issued |
| 08/178955 | DATA STORAGE DEVICE AND METHOD OF OPERATION | Jan 6, 1994 | Abandoned |
Array
(
[id] => 3546667
[patent_doc_number] => 05495432
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-27
[patent_title] => 'Apparatus and method for sampling rate conversion'
[patent_app_type] => 1
[patent_app_number] => 8/177008
[patent_app_country] => US
[patent_app_date] => 1994-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 6781
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/495/05495432.pdf
[firstpage_image] =>[orig_patent_app_number] => 177008
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/177008 | Apparatus and method for sampling rate conversion | Jan 2, 1994 | Issued |
| 08/176351 | SEC-DED-S4ED ROTATIONAL ERROR CORRECTION CODE FOR A COMPUTER SYSTEM | Dec 29, 1993 | Abandoned |
Array
(
[id] => 3916646
[patent_doc_number] => 05951711
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-14
[patent_title] => 'Method and device for determining hamming distance between two multi-bit digital words'
[patent_app_type] => 1
[patent_app_number] => 8/176867
[patent_app_country] => US
[patent_app_date] => 1993-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3640
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/951/05951711.pdf
[firstpage_image] =>[orig_patent_app_number] => 176867
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/176867 | Method and device for determining hamming distance between two multi-bit digital words | Dec 29, 1993 | Issued |
Array
(
[id] => 3598657
[patent_doc_number] => 05497384
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-03-05
[patent_title] => 'Permuted trellis codes for input restricted partial response channels'
[patent_app_type] => 1
[patent_app_number] => 8/174904
[patent_app_country] => US
[patent_app_date] => 1993-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 4861
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/497/05497384.pdf
[firstpage_image] =>[orig_patent_app_number] => 174904
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/174904 | Permuted trellis codes for input restricted partial response channels | Dec 28, 1993 | Issued |
Array
(
[id] => 3516320
[patent_doc_number] => 05570305
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-29
[patent_title] => 'Method and apparatus for the compression, processing and spectral resolution of electromagnetic and acoustic signals'
[patent_app_type] => 1
[patent_app_number] => 8/173627
[patent_app_country] => US
[patent_app_date] => 1993-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 26
[patent_no_of_words] => 10344
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 21
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/570/05570305.pdf
[firstpage_image] =>[orig_patent_app_number] => 173627
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/173627 | Method and apparatus for the compression, processing and spectral resolution of electromagnetic and acoustic signals | Dec 21, 1993 | Issued |
Array
(
[id] => 3467256
[patent_doc_number] => 05473559
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-05
[patent_title] => 'Hardware implemented multiplier'
[patent_app_type] => 1
[patent_app_number] => 8/168498
[patent_app_country] => US
[patent_app_date] => 1993-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 45
[patent_no_of_words] => 20496
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 286
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/473/05473559.pdf
[firstpage_image] =>[orig_patent_app_number] => 168498
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/168498 | Hardware implemented multiplier | Dec 21, 1993 | Issued |