| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3025273
[patent_doc_number] => 05341320
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-08-23
[patent_title] => 'Method for rapidly processing floating-point operations which involve exceptions'
[patent_app_type] => 1
[patent_app_number] => 8/024011
[patent_app_country] => US
[patent_app_date] => 1993-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4459
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/341/05341320.pdf
[firstpage_image] =>[orig_patent_app_number] => 024011
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/024011 | Method for rapidly processing floating-point operations which involve exceptions | Feb 28, 1993 | Issued |
Array
(
[id] => 3079883
[patent_doc_number] => 05361221
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-01
[patent_title] => 'Residue calculation circuit'
[patent_app_type] => 1
[patent_app_number] => 8/023681
[patent_app_country] => US
[patent_app_date] => 1993-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4425
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 390
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/361/05361221.pdf
[firstpage_image] =>[orig_patent_app_number] => 023681
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/023681 | Residue calculation circuit | Feb 25, 1993 | Issued |
| 08/024202 | SAMPLING FREQUENCY CONVERTER | Feb 22, 1993 | Abandoned |
Array
(
[id] => 3125526
[patent_doc_number] => 05410500
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-25
[patent_title] => 'Discrete cosine transform apparatus and inverse discrete cosine transform apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/020313
[patent_app_country] => US
[patent_app_date] => 1993-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 51
[patent_no_of_words] => 13963
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/410/05410500.pdf
[firstpage_image] =>[orig_patent_app_number] => 020313
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/020313 | Discrete cosine transform apparatus and inverse discrete cosine transform apparatus | Feb 18, 1993 | Issued |
Array
(
[id] => 3067658
[patent_doc_number] => 05339263
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-08-16
[patent_title] => 'Combined decimation/interpolation filter for ADC and DAC'
[patent_app_type] => 1
[patent_app_number] => 8/010093
[patent_app_country] => US
[patent_app_date] => 1993-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 20
[patent_no_of_words] => 3881
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 230
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/339/05339263.pdf
[firstpage_image] =>[orig_patent_app_number] => 010093
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/010093 | Combined decimation/interpolation filter for ADC and DAC | Jan 27, 1993 | Issued |
| 07/980490 | COMBINED MULTIPLIER AND ACCUMULATOR | Jan 24, 1993 | Abandoned |
Array
(
[id] => 3103812
[patent_doc_number] => 05369607
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-29
[patent_title] => 'Floating-point and fixed-point addition-subtraction assembly'
[patent_app_type] => 1
[patent_app_number] => 8/003491
[patent_app_country] => US
[patent_app_date] => 1993-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4573
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 361
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/369/05369607.pdf
[firstpage_image] =>[orig_patent_app_number] => 003491
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/003491 | Floating-point and fixed-point addition-subtraction assembly | Jan 11, 1993 | Issued |
Array
(
[id] => 3049276
[patent_doc_number] => 05377134
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-12-27
[patent_title] => 'Leading constant eliminator for extended precision in pipelined division'
[patent_app_type] => 1
[patent_app_number] => 7/998022
[patent_app_country] => US
[patent_app_date] => 1992-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2796
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 272
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/377/05377134.pdf
[firstpage_image] =>[orig_patent_app_number] => 998022
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/998022 | Leading constant eliminator for extended precision in pipelined division | Dec 28, 1992 | Issued |
| 07/994561 | ENHANCED FAST MULTIPLIER | Dec 20, 1992 | Abandoned |
Array
(
[id] => 3469181
[patent_doc_number] => 05442578
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-15
[patent_title] => 'Calculating circuit for error correction'
[patent_app_type] => 1
[patent_app_number] => 7/989035
[patent_app_country] => US
[patent_app_date] => 1992-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 35
[patent_no_of_words] => 22278
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 241
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/442/05442578.pdf
[firstpage_image] =>[orig_patent_app_number] => 989035
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/989035 | Calculating circuit for error correction | Dec 9, 1992 | Issued |
Array
(
[id] => 3431539
[patent_doc_number] => 05390197
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-02-14
[patent_title] => 'Vestigial identification for co-channel interference in cellular communications'
[patent_app_type] => 1
[patent_app_number] => 7/985767
[patent_app_country] => US
[patent_app_date] => 1992-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3965
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/390/05390197.pdf
[firstpage_image] =>[orig_patent_app_number] => 985767
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/985767 | Vestigial identification for co-channel interference in cellular communications | Dec 3, 1992 | Issued |
Array
(
[id] => 3456393
[patent_doc_number] => 05420872
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-30
[patent_title] => 'Apparatus for concealing error in transform coding of a motion picture'
[patent_app_type] => 1
[patent_app_number] => 7/984975
[patent_app_country] => US
[patent_app_date] => 1992-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 22
[patent_no_of_words] => 9286
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/420/05420872.pdf
[firstpage_image] =>[orig_patent_app_number] => 984975
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/984975 | Apparatus for concealing error in transform coding of a motion picture | Dec 2, 1992 | Issued |
| 07/984980 | HAND HELD DATA COLLECTION TERMINAL WITH RECHARGEABLE BATTERY PACK OF SPECIAL CHARGE-ENABLING ASYMMETRICAL CONFIGURATION, AND WITH MODULAR AND BATTERY POWER CONSERVATION FEATURES | Nov 29, 1992 | Abandoned |
Array
(
[id] => 3500593
[patent_doc_number] => 05440571
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-08
[patent_title] => 'Circuit of addressing a memory buffer for error correction in a digital audio tape recorder'
[patent_app_type] => 1
[patent_app_number] => 7/977830
[patent_app_country] => US
[patent_app_date] => 1992-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 20
[patent_no_of_words] => 3011
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/440/05440571.pdf
[firstpage_image] =>[orig_patent_app_number] => 977830
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/977830 | Circuit of addressing a memory buffer for error correction in a digital audio tape recorder | Nov 16, 1992 | Issued |
Array
(
[id] => 3126558
[patent_doc_number] => 05410555
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-25
[patent_title] => 'Viterbi decoding apparatus'
[patent_app_type] => 1
[patent_app_number] => 7/972924
[patent_app_country] => US
[patent_app_date] => 1992-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3703
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/410/05410555.pdf
[firstpage_image] =>[orig_patent_app_number] => 972924
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/972924 | Viterbi decoding apparatus | Nov 5, 1992 | Issued |
Array
(
[id] => 3010113
[patent_doc_number] => 05359610
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-10-25
[patent_title] => 'Error detection encoding system'
[patent_app_type] => 1
[patent_app_number] => 7/967958
[patent_app_country] => US
[patent_app_date] => 1992-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2371
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/359/05359610.pdf
[firstpage_image] =>[orig_patent_app_number] => 967958
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/967958 | Error detection encoding system | Oct 26, 1992 | Issued |
Array
(
[id] => 3678273
[patent_doc_number] => 05600584
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-04
[patent_title] => 'Interactive formula compiler and range estimator'
[patent_app_type] => 1
[patent_app_number] => 7/945262
[patent_app_country] => US
[patent_app_date] => 1992-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7518
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/600/05600584.pdf
[firstpage_image] =>[orig_patent_app_number] => 945262
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/945262 | Interactive formula compiler and range estimator | Sep 14, 1992 | Issued |
Array
(
[id] => 3130443
[patent_doc_number] => 05381359
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-10
[patent_title] => 'Adaptation and training of digital finite impulse response filter within PRML sampling data detection channel'
[patent_app_type] => 1
[patent_app_number] => 7/936761
[patent_app_country] => US
[patent_app_date] => 1992-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 18
[patent_no_of_words] => 9763
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/381/05381359.pdf
[firstpage_image] =>[orig_patent_app_number] => 936761
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/936761 | Adaptation and training of digital finite impulse response filter within PRML sampling data detection channel | Aug 26, 1992 | Issued |
Array
(
[id] => 3436391
[patent_doc_number] => 05416787
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-16
[patent_title] => 'Method and apparatus for encoding and decoding convolutional codes'
[patent_app_type] => 1
[patent_app_number] => 7/921507
[patent_app_country] => US
[patent_app_date] => 1992-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 21
[patent_no_of_words] => 14935
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/416/05416787.pdf
[firstpage_image] =>[orig_patent_app_number] => 921507
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/921507 | Method and apparatus for encoding and decoding convolutional codes | Jul 28, 1992 | Issued |
Array
(
[id] => 3469273
[patent_doc_number] => 05383205
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-17
[patent_title] => 'Semiconductor memory device having an error correction circuit and an error correction method of data in a semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/894661
[patent_app_country] => US
[patent_app_date] => 1992-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 22
[patent_no_of_words] => 10881
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/383/05383205.pdf
[firstpage_image] =>[orig_patent_app_number] => 894661
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/894661 | Semiconductor memory device having an error correction circuit and an error correction method of data in a semiconductor memory device | Jun 4, 1992 | Issued |