Search

Amine Riad

Examiner (ID: 17895, Phone: (571)272-8185 , Office: P/2113 )

Most Active Art Unit
2113
Art Unit(s)
2113
Total Applications
978
Issued Applications
833
Pending Applications
41
Abandoned Applications
119

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6105156 [patent_doc_number] => 20110167296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-07 [patent_title] => 'REGISTER FILE SOFT ERROR RECOVERY' [patent_app_type] => utility [patent_app_number] => 12/652360 [patent_app_country] => US [patent_app_date] => 2010-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4105 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20110167296.pdf [firstpage_image] =>[orig_patent_app_number] => 12652360 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/652360
Register file soft error recovery Jan 4, 2010 Issued
Array ( [id] => 6036099 [patent_doc_number] => 20110083065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-07 [patent_title] => 'False Detection Reduction in Communication Systems' [patent_app_type] => utility [patent_app_number] => 12/652465 [patent_app_country] => US [patent_app_date] => 2010-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4551 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20110083065.pdf [firstpage_image] =>[orig_patent_app_number] => 12652465 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/652465
False Detection Reduction in Communication Systems Jan 4, 2010 Abandoned
Array ( [id] => 6265845 [patent_doc_number] => 20100253555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-07 [patent_title] => 'ENCODING METHOD AND SYSTEM, DECODING METHOD AND SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/651489 [patent_app_country] => US [patent_app_date] => 2010-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 18274 [patent_no_of_claims] => 103 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20100253555.pdf [firstpage_image] =>[orig_patent_app_number] => 12651489 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/651489
Encoding method and system, decoding method and system Jan 3, 2010 Issued
Array ( [id] => 9630040 [patent_doc_number] => 08799735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Channel interleaver having a constellation-based unit-wise permuation module' [patent_app_type] => utility [patent_app_number] => 12/655521 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 5547 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12655521 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/655521
Channel interleaver having a constellation-based unit-wise permuation module Dec 29, 2009 Issued
Array ( [id] => 6166875 [patent_doc_number] => 20110161787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'POWER-REDUCED PRELIMINARY DECODED BITS IN VITERBI DECODERS' [patent_app_type] => utility [patent_app_number] => 12/647885 [patent_app_country] => US [patent_app_date] => 2009-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5909 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20110161787.pdf [firstpage_image] =>[orig_patent_app_number] => 12647885 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/647885
Power-reduced preliminary decoded bits in viterbi decoders Dec 27, 2009 Issued
Array ( [id] => 9358655 [patent_doc_number] => 08677209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-18 [patent_title] => 'Subwords coding using different encoding/decoding matrices' [patent_app_type] => utility [patent_app_number] => 12/644622 [patent_app_country] => US [patent_app_date] => 2009-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6077 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12644622 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/644622
Subwords coding using different encoding/decoding matrices Dec 21, 2009 Issued
Array ( [id] => 6302424 [patent_doc_number] => 20100162066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'Acceleration of header and data error checking via simultaneous execution of multi-level protocol algorithms' [patent_app_type] => utility [patent_app_number] => 12/653829 [patent_app_country] => US [patent_app_date] => 2009-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2749 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20100162066.pdf [firstpage_image] =>[orig_patent_app_number] => 12653829 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/653829
Acceleration of header and data error checking via simultaneous execution of multi-level protocol algorithms Dec 17, 2009 Abandoned
Array ( [id] => 4511024 [patent_doc_number] => 07949892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-24 [patent_title] => 'Computer system and boot control method' [patent_app_type] => utility [patent_app_number] => 12/640678 [patent_app_country] => US [patent_app_date] => 2009-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1999 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/949/07949892.pdf [firstpage_image] =>[orig_patent_app_number] => 12640678 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/640678
Computer system and boot control method Dec 16, 2009 Issued
Array ( [id] => 6302453 [patent_doc_number] => 20100162075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'Low complexity LDCP decoding' [patent_app_type] => utility [patent_app_number] => 12/653657 [patent_app_country] => US [patent_app_date] => 2009-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 15226 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20100162075.pdf [firstpage_image] =>[orig_patent_app_number] => 12653657 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/653657
Low complexity LDCP decoding Dec 14, 2009 Issued
Array ( [id] => 8861571 [patent_doc_number] => 08464125 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-11 [patent_title] => 'Instruction-set architecture for programmable cyclic redundancy check (CRC) computations' [patent_app_type] => utility [patent_app_number] => 12/653249 [patent_app_country] => US [patent_app_date] => 2009-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6544 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12653249 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/653249
Instruction-set architecture for programmable cyclic redundancy check (CRC) computations Dec 9, 2009 Issued
Array ( [id] => 8331660 [patent_doc_number] => 08239737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Data line storage and transmission utilizing both error correcting code and synchronization information' [patent_app_type] => utility [patent_app_number] => 12/634978 [patent_app_country] => US [patent_app_date] => 2009-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2882 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12634978 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/634978
Data line storage and transmission utilizing both error correcting code and synchronization information Dec 9, 2009 Issued
Array ( [id] => 6388678 [patent_doc_number] => 20100083070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'SENDING AND RECEIVING METHOD AND APPARATUS FOR IMPLEMENTING SERVICE DATA RECOVERY' [patent_app_type] => utility [patent_app_number] => 12/632502 [patent_app_country] => US [patent_app_date] => 2009-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5773 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20100083070.pdf [firstpage_image] =>[orig_patent_app_number] => 12632502 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/632502
SENDING AND RECEIVING METHOD AND APPARATUS FOR IMPLEMENTING SERVICE DATA RECOVERY Dec 6, 2009 Abandoned
Array ( [id] => 10144031 [patent_doc_number] => 09176840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Tool for analyzing and resolving errors in a process server' [patent_app_type] => utility [patent_app_number] => 12/622709 [patent_app_country] => US [patent_app_date] => 2009-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5686 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12622709 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/622709
Tool for analyzing and resolving errors in a process server Nov 19, 2009 Issued
Array ( [id] => 9089451 [patent_doc_number] => 08560898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-15 [patent_title] => 'Error correction method and error correction apparatus utilizing the method' [patent_app_type] => utility [patent_app_number] => 12/621509 [patent_app_country] => US [patent_app_date] => 2009-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4174 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12621509 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/621509
Error correction method and error correction apparatus utilizing the method Nov 18, 2009 Issued
Array ( [id] => 10575924 [patent_doc_number] => 09298569 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-29 [patent_title] => 'Log storage and retrieval for broadband communications devices' [patent_app_type] => utility [patent_app_number] => 12/617940 [patent_app_country] => US [patent_app_date] => 2009-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5472 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12617940 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/617940
Log storage and retrieval for broadband communications devices Nov 12, 2009 Issued
Array ( [id] => 6006167 [patent_doc_number] => 20110119525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-19 [patent_title] => 'CHECKPOINTING IN MASSIVELY PARALLEL PROCESSING' [patent_app_type] => utility [patent_app_number] => 12/618675 [patent_app_country] => US [patent_app_date] => 2009-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3995 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20110119525.pdf [firstpage_image] =>[orig_patent_app_number] => 12618675 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/618675
Checkpointing in massively parallel processing Nov 12, 2009 Issued
Array ( [id] => 6450258 [patent_doc_number] => 20100153828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'Method and apparatus for error detection in a communication system' [patent_app_type] => utility [patent_app_number] => 12/612674 [patent_app_country] => US [patent_app_date] => 2009-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12397 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20100153828.pdf [firstpage_image] =>[orig_patent_app_number] => 12612674 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/612674
Method and apparatus for error detection in a communication system Nov 3, 2009 Issued
Array ( [id] => 5976705 [patent_doc_number] => 20110154134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'INFORMATION STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/059009 [patent_app_country] => US [patent_app_date] => 2009-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3710 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20110154134.pdf [firstpage_image] =>[orig_patent_app_number] => 13059009 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/059009
Information storage device Oct 7, 2009 Issued
Array ( [id] => 6553382 [patent_doc_number] => 20100125749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-20 [patent_title] => 'COMPUTER PROGRAM PRODUCT, FAILURE DIAGNOSIS METHOD, AND COMMUNICATION APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/560611 [patent_app_country] => US [patent_app_date] => 2009-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7455 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20100125749.pdf [firstpage_image] =>[orig_patent_app_number] => 12560611 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/560611
Computer program product, failure diagnosis method, and communication apparatus Sep 15, 2009 Issued
Array ( [id] => 7726344 [patent_doc_number] => 08099624 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-01-17 [patent_title] => 'Recovery mechanism for I/O module using out-of-band control path' [patent_app_type] => utility [patent_app_number] => 12/557441 [patent_app_country] => US [patent_app_date] => 2009-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8560 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/099/08099624.pdf [firstpage_image] =>[orig_patent_app_number] => 12557441 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/557441
Recovery mechanism for I/O module using out-of-band control path Sep 9, 2009 Issued
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