| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_doc_number] => 05587950
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[patent_kind] => NA
[patent_issue_date] => 1996-12-24
[patent_title] => 'Test circuit in clock synchronous semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/461907
[patent_app_country] => US
[patent_app_date] => 1995-06-05
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Array
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[patent_doc_number] => 05742551
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-21
[patent_title] => 'Memory circuit improved in electrical characteristics'
[patent_app_type] => 1
[patent_app_number] => 8/463851
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[firstpage_image] =>[orig_patent_app_number] => 463851
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/463851 | Memory circuit improved in electrical characteristics | Jun 4, 1995 | Issued |
Array
(
[id] => 3809222
[patent_doc_number] => 05828602
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-27
[patent_title] => 'Memory system having multiple programmable reference cells'
[patent_app_type] => 1
[patent_app_number] => 8/464016
[patent_app_country] => US
[patent_app_date] => 1995-06-05
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 464016
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/464016 | Memory system having multiple programmable reference cells | Jun 4, 1995 | Issued |
Array
(
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[patent_doc_number] => 05644542
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-01
[patent_title] => 'Stress test for memory arrays in integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 8/460409
[patent_app_country] => US
[patent_app_date] => 1995-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[pdf_file] => patents/05/644/05644542.pdf
[firstpage_image] =>[orig_patent_app_number] => 460409
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/460409 | Stress test for memory arrays in integrated circuits | Jun 1, 1995 | Issued |
Array
(
[id] => 3565126
[patent_doc_number] => 05500831
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-03-19
[patent_title] => 'RAS encoded generator for a memory bank'
[patent_app_type] => 1
[patent_app_number] => 8/458940
[patent_app_country] => US
[patent_app_date] => 1995-06-02
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[firstpage_image] =>[orig_patent_app_number] => 458940
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/458940 | RAS encoded generator for a memory bank | Jun 1, 1995 | Issued |
Array
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[id] => 4054824
[patent_doc_number] => 05875148
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-23
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 8/454118
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[firstpage_image] =>[orig_patent_app_number] => 454118
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Array
(
[id] => 3988552
[patent_doc_number] => 05917752
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-29
[patent_title] => 'Nonvolatile semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/457761
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[pdf_file] => patents/05/917/05917752.pdf
[firstpage_image] =>[orig_patent_app_number] => 457761
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/457761 | Nonvolatile semiconductor memory device | May 31, 1995 | Issued |
Array
(
[id] => 3705222
[patent_doc_number] => 05619459
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-08
[patent_title] => 'On-chip mobile ion contamination test circuit'
[patent_app_type] => 1
[patent_app_number] => 8/455833
[patent_app_country] => US
[patent_app_date] => 1995-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/619/05619459.pdf
[firstpage_image] =>[orig_patent_app_number] => 455833
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/455833 | On-chip mobile ion contamination test circuit | May 30, 1995 | Issued |
| 08/453433 | METHOD FOR ERASING AN EEPROM FLASH MEMORY CELL AND CORRESPONDING ERASING CIRCUIT | May 29, 1995 | Abandoned |
| 08/453268 | SEMICONDUCTOR MEMORY DEVICE | May 29, 1995 | Abandoned |
Array
(
[id] => 3560732
[patent_doc_number] => 05572465
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-05
[patent_title] => 'Power supply configured sensing scheme for flash EEPROM'
[patent_app_type] => 1
[patent_app_number] => 8/451037
[patent_app_country] => US
[patent_app_date] => 1995-05-25
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[pdf_file] => patents/05/572/05572465.pdf
[firstpage_image] =>[orig_patent_app_number] => 451037
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/451037 | Power supply configured sensing scheme for flash EEPROM | May 24, 1995 | Issued |
| 08/450431 | TEST COVERAGE OF EMBEDDED MEMORIES ON SEMICONDUCTOR SUBSTRATES | May 24, 1995 | Abandoned |
Array
(
[id] => 1470021
[patent_doc_number] => 06459623
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-01
[patent_title] => 'EEPROM erasing method'
[patent_app_type] => B1
[patent_app_number] => 08/450553
[patent_app_country] => US
[patent_app_date] => 1995-05-25
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/459/06459623.pdf
[firstpage_image] =>[orig_patent_app_number] => 08450553
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/450553 | EEPROM erasing method | May 24, 1995 | Issued |
Array
(
[id] => 3712527
[patent_doc_number] => 05646886
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-08
[patent_title] => 'Flash memory having segmented array for improved operation'
[patent_app_type] => 1
[patent_app_number] => 8/449564
[patent_app_country] => US
[patent_app_date] => 1995-05-24
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[pdf_file] => patents/05/646/05646886.pdf
[firstpage_image] =>[orig_patent_app_number] => 449564
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/449564 | Flash memory having segmented array for improved operation | May 23, 1995 | Issued |
| 08/440169 | SECTOR ARCHITECTURE FOR FLASH MEMORY DEVICE | May 11, 1995 | Abandoned |
Array
(
[id] => 3727797
[patent_doc_number] => 05617369
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[patent_kind] => NA
[patent_issue_date] => 1997-04-01
[patent_title] => 'Dynamic semiconductor memory device having excellent charge retention characteristics'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/438730 | Dynamic semiconductor memory device having excellent charge retention characteristics | May 9, 1995 | Issued |
Array
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[id] => 3537333
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/437534 | Method and apparatus for simultaneous long writes of multiple cells of a row in a static ram | May 8, 1995 | Issued |
Array
(
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Array
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Array
(
[id] => 3553738
[patent_doc_number] => 05555217
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[patent_issue_date] => 1996-09-10
[patent_title] => 'Semiconductor memory device having presetting function sense amplifier'
[patent_app_type] => 1
[patent_app_number] => 8/434403
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[firstpage_image] =>[orig_patent_app_number] => 434403
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/434403 | Semiconductor memory device having presetting function sense amplifier | May 2, 1995 | Issued |