| Application number | Title of the application | Filing Date | Status |
|---|
| 08/376151 | SEMICONDUCTOR MEMORY DEVICE AND COMPUTER | Jan 19, 1995 | Abandoned |
Array
(
[id] => 3596716
[patent_doc_number] => 05553029
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-03
[patent_title] => 'Precharged bit decoder and sense amplifier with integrated latch usable in pipelined memories'
[patent_app_type] => 1
[patent_app_number] => 8/372523
[patent_app_country] => US
[patent_app_date] => 1995-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 15
[patent_no_of_words] => 9301
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/553/05553029.pdf
[firstpage_image] =>[orig_patent_app_number] => 372523
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/372523 | Precharged bit decoder and sense amplifier with integrated latch usable in pipelined memories | Jan 12, 1995 | Issued |
Array
(
[id] => 3515707
[patent_doc_number] => 05515331
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-07
[patent_title] => 'DRAM refresh control circuit'
[patent_app_type] => 1
[patent_app_number] => 8/368164
[patent_app_country] => US
[patent_app_date] => 1995-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 5078
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/515/05515331.pdf
[firstpage_image] =>[orig_patent_app_number] => 368164
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/368164 | DRAM refresh control circuit | Jan 2, 1995 | Issued |
Array
(
[id] => 3669189
[patent_doc_number] => 05592418
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-07
[patent_title] => 'Non-volatile analog memory cell with double polysilicon level'
[patent_app_type] => 1
[patent_app_number] => 8/367068
[patent_app_country] => US
[patent_app_date] => 1995-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 21
[patent_no_of_words] => 5779
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/592/05592418.pdf
[firstpage_image] =>[orig_patent_app_number] => 367068
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/367068 | Non-volatile analog memory cell with double polysilicon level | Jan 2, 1995 | Issued |
Array
(
[id] => 3704445
[patent_doc_number] => 05596521
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-21
[patent_title] => 'Semiconductor memory with built-in cache'
[patent_app_type] => 1
[patent_app_number] => 8/365970
[patent_app_country] => US
[patent_app_date] => 1994-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 26
[patent_no_of_words] => 18359
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 246
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/596/05596521.pdf
[firstpage_image] =>[orig_patent_app_number] => 365970
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/365970 | Semiconductor memory with built-in cache | Dec 28, 1994 | Issued |
| 08/365155 | COUNT UNIT FOR NONVOLATILE MEMORIES | Dec 27, 1994 | Abandoned |
Array
(
[id] => 3657238
[patent_doc_number] => 05629902
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-13
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/364164
[patent_app_country] => US
[patent_app_date] => 1994-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8795
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/629/05629902.pdf
[firstpage_image] =>[orig_patent_app_number] => 364164
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/364164 | Semiconductor memory device | Dec 26, 1994 | Issued |
Array
(
[id] => 3608490
[patent_doc_number] => 05559732
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-24
[patent_title] => 'Branched photocycle optical memory device'
[patent_app_type] => 1
[patent_app_number] => 8/364138
[patent_app_country] => US
[patent_app_date] => 1994-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 7520
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/559/05559732.pdf
[firstpage_image] =>[orig_patent_app_number] => 364138
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/364138 | Branched photocycle optical memory device | Dec 26, 1994 | Issued |
Array
(
[id] => 3519105
[patent_doc_number] => 05587958
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-24
[patent_title] => 'Semiconductor memory device including a boost potential generation circuit'
[patent_app_type] => 1
[patent_app_number] => 8/363825
[patent_app_country] => US
[patent_app_date] => 1994-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 22
[patent_no_of_words] => 11564
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/587/05587958.pdf
[firstpage_image] =>[orig_patent_app_number] => 363825
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/363825 | Semiconductor memory device including a boost potential generation circuit | Dec 26, 1994 | Issued |
| 08/363881 | NON-VOLATILE SEMICONDUCTOR MEMORY | Dec 26, 1994 | Abandoned |
Array
(
[id] => 3515558
[patent_doc_number] => 05515321
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-07
[patent_title] => 'Data reading method in semiconductor storage device capable of storing three- or multi-valued data in one memory cell'
[patent_app_type] => 1
[patent_app_number] => 8/362785
[patent_app_country] => US
[patent_app_date] => 1994-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 6397
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/515/05515321.pdf
[firstpage_image] =>[orig_patent_app_number] => 362785
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/362785 | Data reading method in semiconductor storage device capable of storing three- or multi-valued data in one memory cell | Dec 22, 1994 | Issued |
| 08/362814 | SINGLE ENDED SIMPLEX DUAL PORT MEMORY CELL | Dec 21, 1994 | Abandoned |
| 08/361675 | SEMICONDUCTOR MEMORY DEVICE | Dec 21, 1994 | Abandoned |
Array
(
[id] => 3582486
[patent_doc_number] => 05539693
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-23
[patent_title] => 'Method of controlling semiconductor storage circuit'
[patent_app_type] => 1
[patent_app_number] => 8/362157
[patent_app_country] => US
[patent_app_date] => 1994-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3556
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 686
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/539/05539693.pdf
[firstpage_image] =>[orig_patent_app_number] => 362157
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/362157 | Method of controlling semiconductor storage circuit | Dec 21, 1994 | Issued |
| 08/363637 | SINGLE ENDED DUAL PORT MEMORY CELL | Dec 21, 1994 | Abandoned |
Array
(
[id] => 3549601
[patent_doc_number] => 05481494
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-02
[patent_title] => 'Method for tightening VT distribution of 5 volt-only flash EEPROMS'
[patent_app_type] => 1
[patent_app_number] => 8/362346
[patent_app_country] => US
[patent_app_date] => 1994-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 4420
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/481/05481494.pdf
[firstpage_image] =>[orig_patent_app_number] => 362346
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/362346 | Method for tightening VT distribution of 5 volt-only flash EEPROMS | Dec 21, 1994 | Issued |
Array
(
[id] => 3623220
[patent_doc_number] => 05535154
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-09
[patent_title] => 'Semiconductor memory device with CMOS-inverter storage cells'
[patent_app_type] => 1
[patent_app_number] => 8/362159
[patent_app_country] => US
[patent_app_date] => 1994-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 7964
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 309
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/535/05535154.pdf
[firstpage_image] =>[orig_patent_app_number] => 362159
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/362159 | Semiconductor memory device with CMOS-inverter storage cells | Dec 21, 1994 | Issued |
Array
(
[id] => 3741275
[patent_doc_number] => 05636169
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-03
[patent_title] => 'Precharge voltage generator'
[patent_app_type] => 1
[patent_app_number] => 8/358755
[patent_app_country] => US
[patent_app_date] => 1994-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3191
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/636/05636169.pdf
[firstpage_image] =>[orig_patent_app_number] => 358755
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/358755 | Precharge voltage generator | Dec 18, 1994 | Issued |
Array
(
[id] => 3541281
[patent_doc_number] => 05583818
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-10
[patent_title] => 'Self-refresh method and refresh control circuit of a semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/358120
[patent_app_country] => US
[patent_app_date] => 1994-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 4191
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/583/05583818.pdf
[firstpage_image] =>[orig_patent_app_number] => 358120
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/358120 | Self-refresh method and refresh control circuit of a semiconductor memory device | Dec 18, 1994 | Issued |
Array
(
[id] => 3527048
[patent_doc_number] => 05506802
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-09
[patent_title] => 'Static random access memory device having high soft error immunity'
[patent_app_type] => 1
[patent_app_number] => 8/358945
[patent_app_country] => US
[patent_app_date] => 1994-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2153
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/506/05506802.pdf
[firstpage_image] =>[orig_patent_app_number] => 358945
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/358945 | Static random access memory device having high soft error immunity | Dec 18, 1994 | Issued |