Search

Amir Zarabian

Supervisory Patent Examiner (ID: 5581, Phone: (571)272-1852 , Office: P/2827 )

Most Active Art Unit
2511
Art Unit(s)
2827, 2818, 2822, 2502, 2511, 2824, 2602
Total Applications
1135
Issued Applications
980
Pending Applications
31
Abandoned Applications
126

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5099930 [patent_doc_number] => 20070183191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Stacked capacitor memory' [patent_app_type] => utility [patent_app_number] => 11/615936 [patent_app_country] => US [patent_app_date] => 2006-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 17564 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20070183191.pdf [firstpage_image] =>[orig_patent_app_number] => 11615936 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/615936
Stacked capacitor memory Dec 22, 2006 Abandoned
Array ( [id] => 5039424 [patent_doc_number] => 20070091706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-26 [patent_title] => 'MEMORY REDUNDANCY PROGRAMMING' [patent_app_type] => utility [patent_app_number] => 11/565439 [patent_app_country] => US [patent_app_date] => 2006-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4519 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20070091706.pdf [firstpage_image] =>[orig_patent_app_number] => 11565439 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/565439
MEMORY REDUNDANCY PROGRAMMING Nov 29, 2006 Abandoned
Array ( [id] => 5674023 [patent_doc_number] => 20060179378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'Semiconductor integrated circuit and method of testing the same' [patent_app_type] => utility [patent_app_number] => 11/338684 [patent_app_country] => US [patent_app_date] => 2006-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12395 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20060179378.pdf [firstpage_image] =>[orig_patent_app_number] => 11338684 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/338684
Semiconductor integrated circuit and method of testing the same Jan 24, 2006 Abandoned
Array ( [id] => 5856390 [patent_doc_number] => 20060227605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Memory architectures including non-volatile memory devices' [patent_app_type] => utility [patent_app_number] => 11/325224 [patent_app_country] => US [patent_app_date] => 2006-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 10139 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20060227605.pdf [firstpage_image] =>[orig_patent_app_number] => 11325224 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/325224
Memory architectures including non-volatile memory devices Jan 2, 2006 Abandoned
Array ( [id] => 6924533 [patent_doc_number] => 20050237788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'Magnetic memory and recording method thereof' [patent_app_type] => utility [patent_app_number] => 11/100914 [patent_app_country] => US [patent_app_date] => 2005-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9268 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20050237788.pdf [firstpage_image] =>[orig_patent_app_number] => 11100914 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/100914
Magnetic memory and recording method thereof Apr 6, 2005 Abandoned
Array ( [id] => 6910406 [patent_doc_number] => 20050174164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-11 [patent_title] => 'Integrated semiconductor memory with temperature-dependent voltage generation' [patent_app_type] => utility [patent_app_number] => 11/050428 [patent_app_country] => US [patent_app_date] => 2005-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7769 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20050174164.pdf [firstpage_image] =>[orig_patent_app_number] => 11050428 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/050428
Integrated semiconductor memory with temperature-dependent voltage generation Feb 3, 2005 Issued
Array ( [id] => 7115532 [patent_doc_number] => 20050068833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Input/output line sense amplifiers and/or input/output line drivers in semiconductor memory devices and methods of operating such devices' [patent_app_type] => utility [patent_app_number] => 10/948498 [patent_app_country] => US [patent_app_date] => 2004-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3257 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20050068833.pdf [firstpage_image] =>[orig_patent_app_number] => 10948498 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/948498
Input/output line sense amplifiers and/or input/output line drivers in semiconductor memory devices and methods of operating such devices Sep 22, 2004 Abandoned
Array ( [id] => 7421278 [patent_doc_number] => 20040183186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Low-profile electronic circuit module and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/801317 [patent_app_country] => US [patent_app_date] => 2004-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3177 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20040183186.pdf [firstpage_image] =>[orig_patent_app_number] => 10801317 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/801317
Low-profile electronic circuit module and method for manufacturing the same Mar 15, 2004 Abandoned
Array ( [id] => 7073665 [patent_doc_number] => 20050146932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-07 [patent_title] => '[NONVOLATILE MEMORY STRUCTURE]' [patent_app_type] => utility [patent_app_number] => 10/707665 [patent_app_country] => US [patent_app_date] => 2003-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3836 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20050146932.pdf [firstpage_image] =>[orig_patent_app_number] => 10707665 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/707665
Nonvolatile memory structure Dec 30, 2003 Issued
Array ( [id] => 7675104 [patent_doc_number] => 20040127014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Method of improving a barrier layer in a via or contact opening' [patent_app_type] => new [patent_app_number] => 10/334197 [patent_app_country] => US [patent_app_date] => 2002-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3817 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20040127014.pdf [firstpage_image] =>[orig_patent_app_number] => 10334197 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/334197
Method of improving a barrier layer in a via or contact opening Dec 29, 2002 Abandoned
Array ( [id] => 6455342 [patent_doc_number] => 20020149991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'Test circuit for testing semiconductor memory' [patent_app_type] => new [patent_app_number] => 10/165651 [patent_app_country] => US [patent_app_date] => 2002-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 21369 [patent_no_of_claims] => 84 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20020149991.pdf [firstpage_image] =>[orig_patent_app_number] => 10165651 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/165651
Test circuit for testing semiconductor memory Jun 5, 2002 Issued
Array ( [id] => 1550255 [patent_doc_number] => 06445618 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Channel-erase nonvolatile semiconductor memory device' [patent_app_type] => B1 [patent_app_number] => 10/081532 [patent_app_country] => US [patent_app_date] => 2002-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 6014 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/445/06445618.pdf [firstpage_image] =>[orig_patent_app_number] => 10081532 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/081532
Channel-erase nonvolatile semiconductor memory device Feb 24, 2002 Issued
Array ( [id] => 5827212 [patent_doc_number] => 20020067650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'Semiconductor memory with built-in cache' [patent_app_type] => new [patent_app_number] => 10/044871 [patent_app_country] => US [patent_app_date] => 2002-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 19102 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20020067650.pdf [firstpage_image] =>[orig_patent_app_number] => 10044871 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/044871
Semiconductor memory with built-in cache Jan 9, 2002 Issued
Array ( [id] => 1426050 [patent_doc_number] => 06510070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-21 [patent_title] => 'Semiconductor memory with built-in cache' [patent_app_type] => B2 [patent_app_number] => 10/044776 [patent_app_country] => US [patent_app_date] => 2002-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 26 [patent_no_of_words] => 18976 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/510/06510070.pdf [firstpage_image] =>[orig_patent_app_number] => 10044776 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/044776
Semiconductor memory with built-in cache Jan 9, 2002 Issued
Array ( [id] => 7644631 [patent_doc_number] => 06473342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-29 [patent_title] => 'Methods of operating split-gate type non-volatile memory cells' [patent_app_type] => B2 [patent_app_number] => 10/025321 [patent_app_country] => US [patent_app_date] => 2001-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3645 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/473/06473342.pdf [firstpage_image] =>[orig_patent_app_number] => 10025321 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/025321
Methods of operating split-gate type non-volatile memory cells Dec 18, 2001 Issued
Array ( [id] => 6367901 [patent_doc_number] => 20020059323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-16 [patent_title] => 'Synchronous dynamic random access memory' [patent_app_type] => new [patent_app_number] => 09/981950 [patent_app_country] => US [patent_app_date] => 2001-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4797 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20020059323.pdf [firstpage_image] =>[orig_patent_app_number] => 09981950 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/981950
Synchronous dynamic random access memory Oct 16, 2001 Issued
Array ( [id] => 1531181 [patent_doc_number] => 06480426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-12 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => B2 [patent_app_number] => 09/977294 [patent_app_country] => US [patent_app_date] => 2001-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 38 [patent_no_of_words] => 12682 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/480/06480426.pdf [firstpage_image] =>[orig_patent_app_number] => 09977294 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/977294
Semiconductor integrated circuit device Oct 15, 2001 Issued
Array ( [id] => 1593601 [patent_doc_number] => 06483761 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-19 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 09/968899 [patent_app_country] => US [patent_app_date] => 2001-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 3592 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/483/06483761.pdf [firstpage_image] =>[orig_patent_app_number] => 09968899 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/968899
Semiconductor memory device Oct 2, 2001 Issued
Array ( [id] => 5813796 [patent_doc_number] => 20020039325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-04 [patent_title] => 'Memory card device including a clock generator' [patent_app_type] => new [patent_app_number] => 09/954184 [patent_app_country] => US [patent_app_date] => 2001-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4798 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20020039325.pdf [firstpage_image] =>[orig_patent_app_number] => 09954184 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/954184
Memory card device including a clock generator Sep 17, 2001 Issued
Array ( [id] => 1507335 [patent_doc_number] => 06466474 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Memory module having a two-transistor memory cell' [patent_app_type] => B1 [patent_app_number] => 09/682399 [patent_app_country] => US [patent_app_date] => 2001-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2774 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/466/06466474.pdf [firstpage_image] =>[orig_patent_app_number] => 09682399 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/682399
Memory module having a two-transistor memory cell Aug 29, 2001 Issued
Menu