Search

Amir Zarabian

Supervisory Patent Examiner (ID: 13021, Phone: (571)272-1852 , Office: P/2827 )

Most Active Art Unit
2511
Art Unit(s)
2824, 2602, 2822, 2502, 2511, 2818, 2827
Total Applications
1128
Issued Applications
976
Pending Applications
28
Abandoned Applications
126

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3021158 [patent_doc_number] => 05282174 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-25 [patent_title] => 'Dual-port memory with read and read/write ports' [patent_app_type] => 1 [patent_app_number] => 7/829105 [patent_app_country] => US [patent_app_date] => 1992-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2416 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/282/05282174.pdf [firstpage_image] =>[orig_patent_app_number] => 829105 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/829105
Dual-port memory with read and read/write ports Jan 30, 1992 Issued
07/827041 MICROWAVE POWERED EXCIMER LAMP WITH HIGH PRESSURE FILL Jan 28, 1992 Abandoned
Array ( [id] => 3021007 [patent_doc_number] => 05282166 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-25 [patent_title] => 'Serial access memory comprising disconnecting circuit between serial bus lines and preamplifier' [patent_app_type] => 1 [patent_app_number] => 7/825214 [patent_app_country] => US [patent_app_date] => 1992-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5916 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/282/05282166.pdf [firstpage_image] =>[orig_patent_app_number] => 825214 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/825214
Serial access memory comprising disconnecting circuit between serial bus lines and preamplifier Jan 23, 1992 Issued
Array ( [id] => 3105441 [patent_doc_number] => 05291454 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-01 [patent_title] => 'Circuit for decreasing current consumption in data output circuit in case one of two supply voltages fails' [patent_app_type] => 1 [patent_app_number] => 7/824626 [patent_app_country] => US [patent_app_date] => 1992-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3682 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/291/05291454.pdf [firstpage_image] =>[orig_patent_app_number] => 824626 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/824626
Circuit for decreasing current consumption in data output circuit in case one of two supply voltages fails Jan 22, 1992 Issued
Array ( [id] => 3096208 [patent_doc_number] => 05285407 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-08 [patent_title] => 'Memory circuit for spatial light modulator' [patent_app_type] => 1 [patent_app_number] => 7/815441 [patent_app_country] => US [patent_app_date] => 1991-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3557 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/285/05285407.pdf [firstpage_image] =>[orig_patent_app_number] => 815441 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/815441
Memory circuit for spatial light modulator Dec 30, 1991 Issued
Array ( [id] => 2947990 [patent_doc_number] => 05260893 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-09 [patent_title] => 'Core memory wire guide and support and utilization method' [patent_app_type] => 1 [patent_app_number] => 7/816301 [patent_app_country] => US [patent_app_date] => 1991-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2506 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/260/05260893.pdf [firstpage_image] =>[orig_patent_app_number] => 816301 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/816301
Core memory wire guide and support and utilization method Dec 26, 1991 Issued
Array ( [id] => 2973828 [patent_doc_number] => 05265057 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-23 [patent_title] => 'Semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 7/813510 [patent_app_country] => US [patent_app_date] => 1991-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7144 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/265/05265057.pdf [firstpage_image] =>[orig_patent_app_number] => 813510 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/813510
Semiconductor memory Dec 25, 1991 Issued
Array ( [id] => 3055539 [patent_doc_number] => 05287312 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-15 [patent_title] => 'Dynamic random access memory' [patent_app_type] => 1 [patent_app_number] => 7/813492 [patent_app_country] => US [patent_app_date] => 1991-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4678 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 390 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/287/05287312.pdf [firstpage_image] =>[orig_patent_app_number] => 813492 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/813492
Dynamic random access memory Dec 25, 1991 Issued
Array ( [id] => 3029535 [patent_doc_number] => 05303193 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-12 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 7/813580 [patent_app_country] => US [patent_app_date] => 1991-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 6298 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/303/05303193.pdf [firstpage_image] =>[orig_patent_app_number] => 813580 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/813580
Semiconductor device Dec 25, 1991 Issued
Array ( [id] => 2780889 [patent_doc_number] => 05151633 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-29 [patent_title] => 'Self-extinguishing gas probe starter for an electrodeless high intensity discharge lamp' [patent_app_type] => 1 [patent_app_number] => 7/812266 [patent_app_country] => US [patent_app_date] => 1991-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2723 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/151/05151633.pdf [firstpage_image] =>[orig_patent_app_number] => 812266 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/812266
Self-extinguishing gas probe starter for an electrodeless high intensity discharge lamp Dec 22, 1991 Issued
Array ( [id] => 2908644 [patent_doc_number] => 05245574 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-14 [patent_title] => 'Apparatus for increasing the speed of operation of non-volatile memory arrays' [patent_app_type] => 1 [patent_app_number] => 7/812631 [patent_app_country] => US [patent_app_date] => 1991-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3266 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/245/05245574.pdf [firstpage_image] =>[orig_patent_app_number] => 812631 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/812631
Apparatus for increasing the speed of operation of non-volatile memory arrays Dec 22, 1991 Issued
Array ( [id] => 2931544 [patent_doc_number] => 05235549 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-10 [patent_title] => 'Semiconductor device with apparatus for performing electrical tests on single memory cells' [patent_app_type] => 1 [patent_app_number] => 7/814401 [patent_app_country] => US [patent_app_date] => 1991-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2771 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/235/05235549.pdf [firstpage_image] =>[orig_patent_app_number] => 814401 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/814401
Semiconductor device with apparatus for performing electrical tests on single memory cells Dec 22, 1991 Issued
Array ( [id] => 3039380 [patent_doc_number] => 05349552 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-09-20 [patent_title] => 'Memory compiler with multiple selectable core elements' [patent_app_type] => 1 [patent_app_number] => 7/811401 [patent_app_country] => US [patent_app_date] => 1991-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2300 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/349/05349552.pdf [firstpage_image] =>[orig_patent_app_number] => 811401 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/811401
Memory compiler with multiple selectable core elements Dec 19, 1991 Issued
Array ( [id] => 2979636 [patent_doc_number] => 05258959 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-02 [patent_title] => 'Memory cell reading circuit' [patent_app_type] => 1 [patent_app_number] => 7/810480 [patent_app_country] => US [patent_app_date] => 1991-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2395 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/258/05258959.pdf [firstpage_image] =>[orig_patent_app_number] => 810480 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/810480
Memory cell reading circuit Dec 18, 1991 Issued
Array ( [id] => 2955671 [patent_doc_number] => 05255224 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-19 [patent_title] => 'Boosted drive system for master/local word line memory architecture' [patent_app_type] => 1 [patent_app_number] => 7/810000 [patent_app_country] => US [patent_app_date] => 1991-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5161 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/255/05255224.pdf [firstpage_image] =>[orig_patent_app_number] => 810000 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/810000
Boosted drive system for master/local word line memory architecture Dec 17, 1991 Issued
Array ( [id] => 2964708 [patent_doc_number] => 05198728 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-30 [patent_title] => 'Operating circuit for a discharge lamp' [patent_app_type] => 1 [patent_app_number] => 7/808665 [patent_app_country] => US [patent_app_date] => 1991-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3162 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/198/05198728.pdf [firstpage_image] =>[orig_patent_app_number] => 808665 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/808665
Operating circuit for a discharge lamp Dec 16, 1991 Issued
07/809392 TRISTATABLE DRIVER FOR INTERNAL DATA BUS LINES Dec 16, 1991 Abandoned
Array ( [id] => 3096449 [patent_doc_number] => 05285419 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-08 [patent_title] => 'Read/write memory with improved test mode data compare' [patent_app_type] => 1 [patent_app_number] => 7/809393 [patent_app_country] => US [patent_app_date] => 1991-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6052 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/285/05285419.pdf [firstpage_image] =>[orig_patent_app_number] => 809393 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/809393
Read/write memory with improved test mode data compare Dec 16, 1991 Issued
Array ( [id] => 2987320 [patent_doc_number] => 05257226 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-26 [patent_title] => 'Integrated circuit with self-biased differential data lines' [patent_app_type] => 1 [patent_app_number] => 7/809733 [patent_app_country] => US [patent_app_date] => 1991-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 8080 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/257/05257226.pdf [firstpage_image] =>[orig_patent_app_number] => 809733 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/809733
Integrated circuit with self-biased differential data lines Dec 16, 1991 Issued
Array ( [id] => 2973301 [patent_doc_number] => 05274592 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-28 [patent_title] => 'Semiconductor integrated circuit device for high-speed transmission of data and for improving reliability of transfer transistor, applicable to DRAM with voltage-raised word lines' [patent_app_type] => 1 [patent_app_number] => 7/805560 [patent_app_country] => US [patent_app_date] => 1991-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5202 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/274/05274592.pdf [firstpage_image] =>[orig_patent_app_number] => 805560 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/805560
Semiconductor integrated circuit device for high-speed transmission of data and for improving reliability of transfer transistor, applicable to DRAM with voltage-raised word lines Dec 12, 1991 Issued
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