
Amir Zarabian
Supervisory Patent Examiner (ID: 5581, Phone: (571)272-1852 , Office: P/2827 )
| Most Active Art Unit | 2511 |
| Art Unit(s) | 2827, 2818, 2822, 2502, 2511, 2824, 2602 |
| Total Applications | 1135 |
| Issued Applications | 980 |
| Pending Applications | 31 |
| Abandoned Applications | 126 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1442666
[patent_doc_number] => 06496443
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-12-17
[patent_title] => 'Data buffer control circuits, integrated circuit memory devices and methods of operation thereof using read cycle initiated data buffer clock signals'
[patent_app_type] => B2
[patent_app_number] => 09/726197
[patent_app_country] => US
[patent_app_date] => 2000-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4506
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/496/06496443.pdf
[firstpage_image] =>[orig_patent_app_number] => 09726197
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/726197 | Data buffer control circuits, integrated circuit memory devices and methods of operation thereof using read cycle initiated data buffer clock signals | Nov 28, 2000 | Issued |
Array
(
[id] => 1603859
[patent_doc_number] => 06434042
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-13
[patent_title] => 'Non-volatile semiconductor memory device capable of reducing read time'
[patent_app_type] => B1
[patent_app_number] => 09/703393
[patent_app_country] => US
[patent_app_date] => 2000-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3517
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/434/06434042.pdf
[firstpage_image] =>[orig_patent_app_number] => 09703393
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/703393 | Non-volatile semiconductor memory device capable of reducing read time | Oct 30, 2000 | Issued |
Array
(
[id] => 1572666
[patent_doc_number] => 06498749
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-12-24
[patent_title] => 'Data processing circuit with non-volatile memory and error correction circuitry'
[patent_app_type] => B1
[patent_app_number] => 09/702389
[patent_app_country] => US
[patent_app_date] => 2000-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 1537
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/498/06498749.pdf
[firstpage_image] =>[orig_patent_app_number] => 09702389
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/702389 | Data processing circuit with non-volatile memory and error correction circuitry | Oct 30, 2000 | Issued |
Array
(
[id] => 4395446
[patent_doc_number] => 06278650
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-21
[patent_title] => 'Semiconductor memory device capable of keeping sensing efficiency of data line sense amplifier uniform'
[patent_app_type] => 1
[patent_app_number] => 9/697899
[patent_app_country] => US
[patent_app_date] => 2000-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3238
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/278/06278650.pdf
[firstpage_image] =>[orig_patent_app_number] => 697899
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/697899 | Semiconductor memory device capable of keeping sensing efficiency of data line sense amplifier uniform | Oct 25, 2000 | Issued |
Array
(
[id] => 1443025
[patent_doc_number] => 06335889
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-01-01
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => B1
[patent_app_number] => 09/688797
[patent_app_country] => US
[patent_app_date] => 2000-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 17
[patent_no_of_words] => 22783
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/335/06335889.pdf
[firstpage_image] =>[orig_patent_app_number] => 09688797
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/688797 | Semiconductor memory device | Oct 16, 2000 | Issued |
Array
(
[id] => 4283364
[patent_doc_number] => 06307796
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-23
[patent_title] => 'Dynamic random access memory'
[patent_app_type] => 1
[patent_app_number] => 9/688083
[patent_app_country] => US
[patent_app_date] => 2000-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4677
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 370
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/307/06307796.pdf
[firstpage_image] =>[orig_patent_app_number] => 688083
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/688083 | Dynamic random access memory | Oct 15, 2000 | Issued |
Array
(
[id] => 1565203
[patent_doc_number] => 06363016
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-26
[patent_title] => 'Method for enhancement of non-volatile memory cell read current'
[patent_app_type] => B1
[patent_app_number] => 09/687479
[patent_app_country] => US
[patent_app_date] => 2000-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 4476
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/363/06363016.pdf
[firstpage_image] =>[orig_patent_app_number] => 09687479
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/687479 | Method for enhancement of non-volatile memory cell read current | Oct 11, 2000 | Issued |
Array
(
[id] => 1590045
[patent_doc_number] => 06359831
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-19
[patent_title] => 'Method and apparatus for multiple latency synchronous dynamic random access memory'
[patent_app_type] => B1
[patent_app_number] => 09/685965
[patent_app_country] => US
[patent_app_date] => 2000-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 12873
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/359/06359831.pdf
[firstpage_image] =>[orig_patent_app_number] => 09685965
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/685965 | Method and apparatus for multiple latency synchronous dynamic random access memory | Oct 9, 2000 | Issued |
Array
(
[id] => 1463740
[patent_doc_number] => 06392933
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-21
[patent_title] => 'EEPROM erasing method'
[patent_app_type] => B1
[patent_app_number] => 09/680315
[patent_app_country] => US
[patent_app_date] => 2000-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 5015
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/392/06392933.pdf
[firstpage_image] =>[orig_patent_app_number] => 09680315
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/680315 | EEPROM erasing method | Oct 5, 2000 | Issued |
Array
(
[id] => 4290894
[patent_doc_number] => 06282118
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-28
[patent_title] => 'Nonvolatile semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 9/684295
[patent_app_country] => US
[patent_app_date] => 2000-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2474
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/282/06282118.pdf
[firstpage_image] =>[orig_patent_app_number] => 684295
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/684295 | Nonvolatile semiconductor memory device | Oct 5, 2000 | Issued |
Array
(
[id] => 1582506
[patent_doc_number] => 06449195
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-10
[patent_title] => 'Method and apparatus for coupling noise reduction in a semiconductor device'
[patent_app_type] => B1
[patent_app_number] => 09/677697
[patent_app_country] => US
[patent_app_date] => 2000-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2299
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/449/06449195.pdf
[firstpage_image] =>[orig_patent_app_number] => 09677697
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/677697 | Method and apparatus for coupling noise reduction in a semiconductor device | Sep 27, 2000 | Issued |
Array
(
[id] => 4358607
[patent_doc_number] => 06285577
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-09-04
[patent_title] => 'Non-volatile memory using ferroelectric capacitor'
[patent_app_type] => 1
[patent_app_number] => 9/671599
[patent_app_country] => US
[patent_app_date] => 2000-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 16
[patent_no_of_words] => 3031
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 24
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/285/06285577.pdf
[firstpage_image] =>[orig_patent_app_number] => 671599
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/671599 | Non-volatile memory using ferroelectric capacitor | Sep 27, 2000 | Issued |
Array
(
[id] => 1599766
[patent_doc_number] => 06385115
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-07
[patent_title] => 'Semiconductor memory device with sense amplifier power supply configuration capable of supplying stable power supply voltage to sense amplifiers'
[patent_app_type] => B1
[patent_app_number] => 09/670993
[patent_app_country] => US
[patent_app_date] => 2000-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 27
[patent_no_of_words] => 14353
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/385/06385115.pdf
[firstpage_image] =>[orig_patent_app_number] => 09670993
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/670993 | Semiconductor memory device with sense amplifier power supply configuration capable of supplying stable power supply voltage to sense amplifiers | Sep 25, 2000 | Issued |
Array
(
[id] => 4286873
[patent_doc_number] => 06324108
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-11-27
[patent_title] => 'Application of external voltage during array VT testing'
[patent_app_type] => 1
[patent_app_number] => 9/667891
[patent_app_country] => US
[patent_app_date] => 2000-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5893
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/324/06324108.pdf
[firstpage_image] =>[orig_patent_app_number] => 667891
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/667891 | Application of external voltage during array VT testing | Sep 21, 2000 | Issued |
Array
(
[id] => 4283101
[patent_doc_number] => 06307777
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-23
[patent_title] => 'Nonvolatile semiconductor storage device'
[patent_app_type] => 1
[patent_app_number] => 9/646789
[patent_app_country] => US
[patent_app_date] => 2000-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 4271
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/307/06307777.pdf
[firstpage_image] =>[orig_patent_app_number] => 646789
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/646789 | Nonvolatile semiconductor storage device | Sep 20, 2000 | Issued |
Array
(
[id] => 1488571
[patent_doc_number] => 06366500
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-04-02
[patent_title] => 'Process for making and programming and operating a dual-bit multi-level ballistic flash memory'
[patent_app_type] => B1
[patent_app_number] => 09/656395
[patent_app_country] => US
[patent_app_date] => 2000-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 28
[patent_no_of_words] => 7288
[patent_no_of_claims] => 45
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/366/06366500.pdf
[firstpage_image] =>[orig_patent_app_number] => 09656395
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/656395 | Process for making and programming and operating a dual-bit multi-level ballistic flash memory | Sep 5, 2000 | Issued |
Array
(
[id] => 1567624
[patent_doc_number] => 06339547
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-01-15
[patent_title] => 'Apparatus and method for programming voltage protection in a non-volatile memory system'
[patent_app_type] => B1
[patent_app_number] => 09/651063
[patent_app_country] => US
[patent_app_date] => 2000-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6871
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/339/06339547.pdf
[firstpage_image] =>[orig_patent_app_number] => 09651063
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/651063 | Apparatus and method for programming voltage protection in a non-volatile memory system | Aug 29, 2000 | Issued |
Array
(
[id] => 4416311
[patent_doc_number] => 06272048
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-07
[patent_title] => 'Apparatus and method for programming voltage protection in a non-volatile memory system'
[patent_app_type] => 1
[patent_app_number] => 9/650879
[patent_app_country] => US
[patent_app_date] => 2000-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6773
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/272/06272048.pdf
[firstpage_image] =>[orig_patent_app_number] => 650879
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/650879 | Apparatus and method for programming voltage protection in a non-volatile memory system | Aug 29, 2000 | Issued |
Array
(
[id] => 1593550
[patent_doc_number] => 06483749
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-11-19
[patent_title] => 'Nonvolatile memory device having bulk bias contact structure in cell array region'
[patent_app_type] => B1
[patent_app_number] => 09/650493
[patent_app_country] => US
[patent_app_date] => 2000-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 69
[patent_no_of_words] => 12448
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/483/06483749.pdf
[firstpage_image] =>[orig_patent_app_number] => 09650493
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/650493 | Nonvolatile memory device having bulk bias contact structure in cell array region | Aug 28, 2000 | Issued |
Array
(
[id] => 1570390
[patent_doc_number] => 06377503
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-04-23
[patent_title] => 'Synchronous dynamic random access memory'
[patent_app_type] => B1
[patent_app_number] => 09/645291
[patent_app_country] => US
[patent_app_date] => 2000-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 4809
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 476
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/377/06377503.pdf
[firstpage_image] =>[orig_patent_app_number] => 09645291
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/645291 | Synchronous dynamic random access memory | Aug 23, 2000 | Issued |