Search

Amir Zarabian

Supervisory Patent Examiner (ID: 5581, Phone: (571)272-1852 , Office: P/2827 )

Most Active Art Unit
2511
Art Unit(s)
2827, 2818, 2822, 2502, 2511, 2824, 2602
Total Applications
1135
Issued Applications
980
Pending Applications
31
Abandoned Applications
126

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1425733 [patent_doc_number] => 06525967 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'Fast-sensing amplifier for flash memory' [patent_app_type] => B1 [patent_app_number] => 09/642953 [patent_app_country] => US [patent_app_date] => 2000-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4383 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/525/06525967.pdf [firstpage_image] =>[orig_patent_app_number] => 09642953 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/642953
Fast-sensing amplifier for flash memory Aug 20, 2000 Issued
Array ( [id] => 1442609 [patent_doc_number] => 06496425 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Multiple bit line column redundancy' [patent_app_type] => B1 [patent_app_number] => 09/642341 [patent_app_country] => US [patent_app_date] => 2000-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6662 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496425.pdf [firstpage_image] =>[orig_patent_app_number] => 09642341 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/642341
Multiple bit line column redundancy Aug 20, 2000 Issued
Array ( [id] => 1567628 [patent_doc_number] => 06339548 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-15 [patent_title] => 'Data reading method in semiconductor storage device capable of storing three- or multi-valued data in one memory cell' [patent_app_type] => B1 [patent_app_number] => 09/642081 [patent_app_country] => US [patent_app_date] => 2000-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6460 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/339/06339548.pdf [firstpage_image] =>[orig_patent_app_number] => 09642081 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/642081
Data reading method in semiconductor storage device capable of storing three- or multi-valued data in one memory cell Aug 20, 2000 Issued
Array ( [id] => 1437694 [patent_doc_number] => 06356492 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Method and apparatus for reducing current drain caused by row to column shorts in a memory device' [patent_app_type] => B1 [patent_app_number] => 09/639991 [patent_app_country] => US [patent_app_date] => 2000-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1999 [patent_no_of_claims] => 78 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/356/06356492.pdf [firstpage_image] =>[orig_patent_app_number] => 09639991 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/639991
Method and apparatus for reducing current drain caused by row to column shorts in a memory device Aug 15, 2000 Issued
Array ( [id] => 1564227 [patent_doc_number] => 06438030 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Non-volatile memory, method of manufacture, and method of programming' [patent_app_type] => B1 [patent_app_number] => 09/639195 [patent_app_country] => US [patent_app_date] => 2000-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 6706 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/438/06438030.pdf [firstpage_image] =>[orig_patent_app_number] => 09639195 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/639195
Non-volatile memory, method of manufacture, and method of programming Aug 14, 2000 Issued
Array ( [id] => 1550210 [patent_doc_number] => 06445605 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Circuit for programming antifuse bits' [patent_app_type] => B1 [patent_app_number] => 09/635965 [patent_app_country] => US [patent_app_date] => 2000-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4187 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/445/06445605.pdf [firstpage_image] =>[orig_patent_app_number] => 09635965 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/635965
Circuit for programming antifuse bits Aug 9, 2000 Issued
Array ( [id] => 1499267 [patent_doc_number] => 06404693 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Integrated circuit memory devices that select sub-array blocks and input/output line pairs based on input/output bandwidth, and methods of controlling same' [patent_app_type] => B1 [patent_app_number] => 09/634393 [patent_app_country] => US [patent_app_date] => 2000-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5508 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 337 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/404/06404693.pdf [firstpage_image] =>[orig_patent_app_number] => 09634393 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/634393
Integrated circuit memory devices that select sub-array blocks and input/output line pairs based on input/output bandwidth, and methods of controlling same Aug 8, 2000 Issued
Array ( [id] => 1538446 [patent_doc_number] => 06337817 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-08 [patent_title] => 'Semiconductor device having redundancy circuit' [patent_app_type] => B1 [patent_app_number] => 09/633271 [patent_app_country] => US [patent_app_date] => 2000-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 36 [patent_no_of_words] => 16405 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/337/06337817.pdf [firstpage_image] =>[orig_patent_app_number] => 09633271 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/633271
Semiconductor device having redundancy circuit Aug 3, 2000 Issued
Array ( [id] => 1488561 [patent_doc_number] => 06366496 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Method for programming multi-level non-volatile memories by controlling the gate voltage' [patent_app_type] => B1 [patent_app_number] => 09/631187 [patent_app_country] => US [patent_app_date] => 2000-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5745 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/366/06366496.pdf [firstpage_image] =>[orig_patent_app_number] => 09631187 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/631187
Method for programming multi-level non-volatile memories by controlling the gate voltage Aug 1, 2000 Issued
Array ( [id] => 4326286 [patent_doc_number] => 06317366 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Dynamic random access memory' [patent_app_type] => 1 [patent_app_number] => 9/630585 [patent_app_country] => US [patent_app_date] => 2000-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4682 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/317/06317366.pdf [firstpage_image] =>[orig_patent_app_number] => 630585 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/630585
Dynamic random access memory Jul 31, 2000 Issued
Array ( [id] => 1442586 [patent_doc_number] => 06496417 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Method and integrated circuit for bit line soft programming (BLISP)' [patent_app_type] => B1 [patent_app_number] => 09/601089 [patent_app_country] => US [patent_app_date] => 2000-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 16766 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496417.pdf [firstpage_image] =>[orig_patent_app_number] => 09601089 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/601089
Method and integrated circuit for bit line soft programming (BLISP) Jul 26, 2000 Issued
Array ( [id] => 1429502 [patent_doc_number] => 06515922 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-04 [patent_title] => 'Memory module' [patent_app_type] => B1 [patent_app_number] => 09/621693 [patent_app_country] => US [patent_app_date] => 2000-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 8004 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/515/06515922.pdf [firstpage_image] =>[orig_patent_app_number] => 09621693 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/621693
Memory module Jul 20, 2000 Issued
Array ( [id] => 4286609 [patent_doc_number] => 06324090 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Nonvolatile ferroelectric memory device' [patent_app_type] => 1 [patent_app_number] => 9/620599 [patent_app_country] => US [patent_app_date] => 2000-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6442 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/324/06324090.pdf [firstpage_image] =>[orig_patent_app_number] => 620599 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/620599
Nonvolatile ferroelectric memory device Jul 19, 2000 Issued
Array ( [id] => 4419212 [patent_doc_number] => 06301162 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Single electron MOSFET memory device and method' [patent_app_type] => 1 [patent_app_number] => 9/619352 [patent_app_country] => US [patent_app_date] => 2000-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 9373 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/301/06301162.pdf [firstpage_image] =>[orig_patent_app_number] => 619352 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/619352
Single electron MOSFET memory device and method Jul 18, 2000 Issued
Array ( [id] => 4407133 [patent_doc_number] => 06297994 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Single electron MOSFET memory device and method' [patent_app_type] => 1 [patent_app_number] => 9/619177 [patent_app_country] => US [patent_app_date] => 2000-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 9288 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/297/06297994.pdf [firstpage_image] =>[orig_patent_app_number] => 619177 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/619177
Single electron MOSFET memory device and method Jul 18, 2000 Issued
Array ( [id] => 4262901 [patent_doc_number] => 06222778 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Single electron MOSFET memory device and method' [patent_app_type] => 1 [patent_app_number] => 9/619265 [patent_app_country] => US [patent_app_date] => 2000-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 9181 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/222/06222778.pdf [firstpage_image] =>[orig_patent_app_number] => 619265 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/619265
Single electron MOSFET memory device and method Jul 18, 2000 Issued
Array ( [id] => 4393282 [patent_doc_number] => 06304493 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Single electron MOSFET memory device and method' [patent_app_type] => 1 [patent_app_number] => 9/619404 [patent_app_country] => US [patent_app_date] => 2000-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 9296 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/304/06304493.pdf [firstpage_image] =>[orig_patent_app_number] => 619404 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/619404
Single electron MOSFET memory device and method Jul 18, 2000 Issued
Array ( [id] => 1473347 [patent_doc_number] => 06407962 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Memory module having data switcher in high speed memory device' [patent_app_type] => B1 [patent_app_number] => 09/617535 [patent_app_country] => US [patent_app_date] => 2000-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4185 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/407/06407962.pdf [firstpage_image] =>[orig_patent_app_number] => 09617535 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/617535
Memory module having data switcher in high speed memory device Jul 13, 2000 Issued
Array ( [id] => 1565250 [patent_doc_number] => 06363026 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Address generating device for use in multi-stage channel interleaver/deinterleaver' [patent_app_type] => B1 [patent_app_number] => 09/615415 [patent_app_country] => US [patent_app_date] => 2000-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4977 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363026.pdf [firstpage_image] =>[orig_patent_app_number] => 09615415 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/615415
Address generating device for use in multi-stage channel interleaver/deinterleaver Jul 12, 2000 Issued
Array ( [id] => 4327278 [patent_doc_number] => 06243292 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Nonvolatile semiconductor memory device capable of reducing memory array area' [patent_app_type] => 1 [patent_app_number] => 9/613691 [patent_app_country] => US [patent_app_date] => 2000-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6684 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 423 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/243/06243292.pdf [firstpage_image] =>[orig_patent_app_number] => 613691 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/613691
Nonvolatile semiconductor memory device capable of reducing memory array area Jul 9, 2000 Issued
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