Search

Amy Jo Sterling

Examiner (ID: 11274, Phone: (571)272-6823 , Office: P/3631 )

Most Active Art Unit
3631
Art Unit(s)
3631, 3632
Total Applications
2836
Issued Applications
2057
Pending Applications
141
Abandoned Applications
673

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13996577 [patent_doc_number] => 20190067446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => Integrated Circuit With a Fin and Gate Structure and Method Making the Same [patent_app_type] => utility [patent_app_number] => 15/864525 [patent_app_country] => US [patent_app_date] => 2018-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9093 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15864525 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/864525
Integrated circuit with a fin and gate structure and method making the same Jan 7, 2018 Issued
Array ( [id] => 16202143 [patent_doc_number] => 10727323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Three-dimensional (3D) tunneling field-effect transistor (FET) [patent_app_type] => utility [patent_app_number] => 15/864685 [patent_app_country] => US [patent_app_date] => 2018-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 31 [patent_no_of_words] => 6476 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15864685 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/864685
Three-dimensional (3D) tunneling field-effect transistor (FET) Jan 7, 2018 Issued
Array ( [id] => 15061629 [patent_doc_number] => 10461127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Variable resistance memory device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/864388 [patent_app_country] => US [patent_app_date] => 2018-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 31 [patent_no_of_words] => 11652 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15864388 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/864388
Variable resistance memory device and method of manufacturing the same Jan 7, 2018 Issued
Array ( [id] => 14738539 [patent_doc_number] => 10388680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => Display panel and display apparatus [patent_app_type] => utility [patent_app_number] => 15/864397 [patent_app_country] => US [patent_app_date] => 2018-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 9363 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15864397 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/864397
Display panel and display apparatus Jan 7, 2018 Issued
Array ( [id] => 16339476 [patent_doc_number] => 10790447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Mask for thin film deposition, method of manufacturing the same, and method of manufacturing a display apparatus using the same [patent_app_type] => utility [patent_app_number] => 15/865141 [patent_app_country] => US [patent_app_date] => 2018-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 8338 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15865141 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/865141
Mask for thin film deposition, method of manufacturing the same, and method of manufacturing a display apparatus using the same Jan 7, 2018 Issued
Array ( [id] => 13808265 [patent_doc_number] => 10181401 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-01-15 [patent_title] => Method for manufacturing a semiconductor device [patent_app_type] => utility [patent_app_number] => 15/865227 [patent_app_country] => US [patent_app_date] => 2018-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 32 [patent_no_of_words] => 4671 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15865227 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/865227
Method for manufacturing a semiconductor device Jan 7, 2018 Issued
Array ( [id] => 15641335 [patent_doc_number] => 10593672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Method and structure of forming strained channels for CMOS device fabrication [patent_app_type] => utility [patent_app_number] => 15/864577 [patent_app_country] => US [patent_app_date] => 2018-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 8507 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15864577 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/864577
Method and structure of forming strained channels for CMOS device fabrication Jan 7, 2018 Issued
Array ( [id] => 15889671 [patent_doc_number] => 10651191 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => Semiconductor device and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 15/864410 [patent_app_country] => US [patent_app_date] => 2018-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11632 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15864410 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/864410
Semiconductor device and method of fabricating the same Jan 7, 2018 Issued
Array ( [id] => 12759952 [patent_doc_number] => 20180145152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-24 [patent_title] => DOPED POLY-SILICON FOR POLYCMP PLANARITY IMPROVEMENT [patent_app_type] => utility [patent_app_number] => 15/860308 [patent_app_country] => US [patent_app_date] => 2018-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8594 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15860308 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/860308
Doped poly-silicon for PolyCMP planarity improvement Jan 1, 2018 Issued
Array ( [id] => 12918442 [patent_doc_number] => 20180197990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-12 [patent_title] => REDUCED RESISTANCE SOURCE AND DRAIN EXTENSIONS IN VERTICAL FIELD EFFECT TRANSISTORS [patent_app_type] => utility [patent_app_number] => 15/850891 [patent_app_country] => US [patent_app_date] => 2017-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15850891 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/850891
Reduced resistance source and drain extensions in vertical field effect transistors Dec 20, 2017 Issued
Array ( [id] => 17456220 [patent_doc_number] => 11271087 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Metal gate process for FinFET device improvement [patent_app_type] => utility [patent_app_number] => 15/831155 [patent_app_country] => US [patent_app_date] => 2017-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5715 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15831155 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/831155
Metal gate process for FinFET device improvement Dec 3, 2017 Issued
Array ( [id] => 14191429 [patent_doc_number] => 20190115420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => PRECISION BEOL RESISTORS [patent_app_type] => utility [patent_app_number] => 15/816622 [patent_app_country] => US [patent_app_date] => 2017-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15816622 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/816622
Precision BEOL resistors Nov 16, 2017 Issued
Array ( [id] => 14492311 [patent_doc_number] => 10332956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => Precision beol resistors [patent_app_type] => utility [patent_app_number] => 15/816645 [patent_app_country] => US [patent_app_date] => 2017-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 7594 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15816645 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/816645
Precision beol resistors Nov 16, 2017 Issued
Array ( [id] => 14191427 [patent_doc_number] => 20190115419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => PRECISION BEOL RESISTORS [patent_app_type] => utility [patent_app_number] => 15/816531 [patent_app_country] => US [patent_app_date] => 2017-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7594 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15816531 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/816531
Precision BEOL resistors Nov 16, 2017 Issued
Array ( [id] => 12717124 [patent_doc_number] => 20180130874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-10 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/808146 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13495 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15808146 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/808146
Semiconductor device Nov 8, 2017 Issued
Array ( [id] => 16785961 [patent_doc_number] => 10988373 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => MEMS component having low-resistance wiring and method for manufacturing it [patent_app_type] => utility [patent_app_number] => 15/807811 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3128 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15807811 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/807811
MEMS component having low-resistance wiring and method for manufacturing it Nov 8, 2017 Issued
Array ( [id] => 12738634 [patent_doc_number] => 20180138045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => SEMICONDUCTOR STRUCTURES AND FABRICATION METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 15/807982 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15807982 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/807982
SEMICONDUCTOR STRUCTURES AND FABRICATION METHODS THEREOF Nov 8, 2017 Abandoned
Array ( [id] => 15077887 [patent_doc_number] => 10468444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => Image sensor device and method for forming the same [patent_app_type] => utility [patent_app_number] => 15/807980 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6633 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15807980 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/807980
Image sensor device and method for forming the same Nov 8, 2017 Issued
Array ( [id] => 13306635 [patent_doc_number] => 20180204854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-19 [patent_title] => DISPLAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/807632 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3358 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15807632 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/807632
Display substrate and manufacturing method thereof, and display device Nov 8, 2017 Issued
Array ( [id] => 12800830 [patent_doc_number] => 20180158779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => Semiconductor Device and Method of Forming an Integrated SIP Module with Embedded Inductor or Package [patent_app_type] => utility [patent_app_number] => 15/807833 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15807833 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/807833
Semiconductor device and method of forming an integrated SIP module with embedded inductor or package Nov 8, 2017 Issued
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