Amy K Levelle

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Array ( [id] => 7022962 [patent_doc_number] => 20050017356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/866195 [patent_app_country] => US [patent_app_date] => 2004-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2512 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20050017356.pdf [firstpage_image] =>[orig_patent_app_number] => 10866195 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7058958 [patent_doc_number] => 20050001317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Polyelectrolyte nanolayers as diffusion barriers in semiconductor devices' [patent_app_type] => utility [patent_app_number] => 10/866005 [patent_app_country] => US [patent_app_date] => 2004-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6257 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20050001317.pdf [firstpage_image] =>[orig_patent_app_number] => 10866005 [rel_patent_id] =>[rel_patent_doc_number] =>)

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Array ( [id] => 692012 [patent_doc_number] => 07075147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-11 [patent_title] => 'Low on resistance power MOSFET with variably spaced trenches and offset contacts' [patent_app_type] => utility [patent_app_number] => 10/864056 [patent_app_country] => US [patent_app_date] => 2004-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2209 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/075/07075147.pdf [firstpage_image] =>[orig_patent_app_number] => 10864056 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7228660 [patent_doc_number] => 20050269659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-08 [patent_title] => 'ESD PERFORMANCE USING SEPARATE DIODE GROUPS' [patent_app_type] => utility [patent_app_number] => 10/863435 [patent_app_country] => US [patent_app_date] => 2004-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3710 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0269/20050269659.pdf [firstpage_image] =>[orig_patent_app_number] => 10863435 [rel_patent_id] =>[rel_patent_doc_number] =>)

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Array ( [id] => 968906 [patent_doc_number] => 06940183 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-09-06 [patent_title] => 'Compound filled in lead IC packaging product' [patent_app_type] => utility [patent_app_number] => 10/860056 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 1341 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/940/06940183.pdf [firstpage_image] =>[orig_patent_app_number] => 10860056 [rel_patent_id] =>[rel_patent_doc_number] =>)

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