Amy Regina Weisberg
Examiner (ID: 13118, Phone: (571)270-5500 , Office: P/3731 )
Most Active Art Unit | 3649 |
Art Unit(s) | 3612, 3734, 3771, 3649, 3731 |
Total Applications | 622 |
Issued Applications | 338 |
Pending Applications | 15 |
Abandoned Applications | 269 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 9789512
[patent_doc_number] => 20150001456
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-01-01
[patent_title] => 'RESISTANCE VARIABLE ELEMENT, SEMICONDUCTOR DEVICE INCLUDING IT AND MANUFACTURING METHODS THEREFOR'
[patent_app_type] => utility
[patent_app_number] => 14/117306
[patent_app_country] => US
[patent_app_date] => 2012-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 18083
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14117306
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/117306 | RESISTANCE VARIABLE ELEMENT, SEMICONDUCTOR DEVICE INCLUDING IT AND MANUFACTURING METHODS THEREFOR | May 9, 2012 | Abandoned |
Array
(
[id] => 8417178
[patent_doc_number] => 20120244678
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-27
[patent_title] => 'SEMICONDUCTOR DEVICE WAFER BONDING METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/423477
[patent_app_country] => US
[patent_app_date] => 2012-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2528
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13423477
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/423477 | SEMICONDUCTOR DEVICE WAFER BONDING METHOD | Mar 18, 2012 | Abandoned |
Array
(
[id] => 8417163
[patent_doc_number] => 20120244663
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-27
[patent_title] => 'SEMICONDUCTOR DEVICE CHIP MOUNTING METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/423454
[patent_app_country] => US
[patent_app_date] => 2012-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 3867
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13423454
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/423454 | SEMICONDUCTOR DEVICE CHIP MOUNTING METHOD | Mar 18, 2012 | Abandoned |
Array
(
[id] => 8684551
[patent_doc_number] => 20130052835
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-02-28
[patent_title] => 'PATTERN TRANSFER APPARATUS AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/422942
[patent_app_country] => US
[patent_app_date] => 2012-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3172
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13422942
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/422942 | Pattern transfer apparatus and method for fabricating semiconductor device | Mar 15, 2012 | Issued |
Array
(
[id] => 8430312
[patent_doc_number] => 20120252187
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-04
[patent_title] => 'Semiconductor Device and Method of Manufacturing the Same'
[patent_app_type] => utility
[patent_app_number] => 13/422487
[patent_app_country] => US
[patent_app_date] => 2012-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 7695
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13422487
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/422487 | Semiconductor device and method of manufacturing the same | Mar 15, 2012 | Issued |
Array
(
[id] => 9038415
[patent_doc_number] => 20130241053
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-19
[patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE PILLARS AND MOLDED CAVITIES AND METHOD OF MANUFACTURE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/422649
[patent_app_country] => US
[patent_app_date] => 2012-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 9919
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13422649
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/422649 | Integrated circuit packaging system with conductive pillars and molded cavities and method of manufacture thereof | Mar 15, 2012 | Issued |
Array
(
[id] => 9041784
[patent_doc_number] => 20130244422
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-19
[patent_title] => 'METHODS OF FORMING COPPER-BASED CONDUCTIVE STRUCTURES ON SEMICONDUCTOR DEVICES'
[patent_app_type] => utility
[patent_app_number] => 13/422439
[patent_app_country] => US
[patent_app_date] => 2012-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3306
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13422439
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/422439 | Methods of forming copper-based conductive structures on semiconductor devices | Mar 15, 2012 | Issued |
Array
(
[id] => 8566670
[patent_doc_number] => 20120329241
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-27
[patent_title] => 'SEMICONDUCTOR MANUFACTURING APPARATUS AND SEMICONDUCTOR MANUFACTURING METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/422966
[patent_app_country] => US
[patent_app_date] => 2012-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6891
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13422966
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/422966 | Semiconductor manufacturing apparatus and semiconductor manufacturing method | Mar 15, 2012 | Issued |
Array
(
[id] => 9064941
[patent_doc_number] => 20130256697
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-03
[patent_title] => 'GROUP-III-NITRIDE BASED LAYER STRUCTURE AND SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/993105
[patent_app_country] => US
[patent_app_date] => 2011-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3505
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13993105
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/993105 | GROUP-III-NITRIDE BASED LAYER STRUCTURE AND SEMICONDUCTOR DEVICE | Dec 22, 2011 | Abandoned |
Array
(
[id] => 10053759
[patent_doc_number] => 09093646
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-07-28
[patent_title] => 'Vapor deposition method and method for manufacturing organic electroluminescent display device'
[patent_app_type] => utility
[patent_app_number] => 13/992613
[patent_app_country] => US
[patent_app_date] => 2011-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 14383
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13992613
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/992613 | Vapor deposition method and method for manufacturing organic electroluminescent display device | Dec 6, 2011 | Issued |
Array
(
[id] => 8240480
[patent_doc_number] => 20120149213
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-14
[patent_title] => 'BOTTOM UP FILL IN HIGH ASPECT RATIO TRENCHES'
[patent_app_type] => utility
[patent_app_number] => 13/313735
[patent_app_country] => US
[patent_app_date] => 2011-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 12176
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13313735
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/313735 | BOTTOM UP FILL IN HIGH ASPECT RATIO TRENCHES | Dec 6, 2011 | Abandoned |
Array
(
[id] => 9106098
[patent_doc_number] => 20130279230
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-24
[patent_title] => 'Power Module'
[patent_app_type] => utility
[patent_app_number] => 13/996640
[patent_app_country] => US
[patent_app_date] => 2011-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 12759
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13996640
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/996640 | Power module | Dec 6, 2011 | Issued |
Array
(
[id] => 9703807
[patent_doc_number] => 08828868
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-09
[patent_title] => 'Method for forming hard mask in semiconductor device fabrication'
[patent_app_type] => utility
[patent_app_number] => 13/314000
[patent_app_country] => US
[patent_app_date] => 2011-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 4194
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13314000
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/314000 | Method for forming hard mask in semiconductor device fabrication | Dec 6, 2011 | Issued |
Array
(
[id] => 10551529
[patent_doc_number] => 09276163
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-03-01
[patent_title] => 'Method for manufacturing silicon-based solar cell'
[patent_app_type] => utility
[patent_app_number] => 13/879367
[patent_app_country] => US
[patent_app_date] => 2011-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 8669
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13879367
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/879367 | Method for manufacturing silicon-based solar cell | Oct 13, 2011 | Issued |
Array
(
[id] => 10936625
[patent_doc_number] => 20140339646
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-20
[patent_title] => 'NON-PLANAR TRANSITOR FIN FABRICATION'
[patent_app_type] => utility
[patent_app_number] => 13/992806
[patent_app_country] => US
[patent_app_date] => 2011-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2877
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13992806
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/992806 | NON-PLANAR TRANSITOR FIN FABRICATION | Sep 29, 2011 | Abandoned |
Array
(
[id] => 9662111
[patent_doc_number] => 08809085
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-19
[patent_title] => 'Method for manufacturing nitride semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/222238
[patent_app_country] => US
[patent_app_date] => 2011-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 33
[patent_no_of_words] => 7783
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13222238
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/222238 | Method for manufacturing nitride semiconductor device | Aug 30, 2011 | Issued |
Array
(
[id] => 9054659
[patent_doc_number] => 20130252373
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-26
[patent_title] => 'Method for Depositing a Coating on a Substrate by Chemical Vapour Deposition'
[patent_app_type] => utility
[patent_app_number] => 13/819246
[patent_app_country] => US
[patent_app_date] => 2011-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5983
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13819246
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/819246 | Method for Depositing a Coating on a Substrate by Chemical Vapour Deposition | Aug 25, 2011 | Abandoned |
Array
(
[id] => 10060263
[patent_doc_number] => 09099627
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-08-04
[patent_title] => 'Method for producing group III nitride semiconductor light-emitting device'
[patent_app_type] => utility
[patent_app_number] => 13/824286
[patent_app_country] => US
[patent_app_date] => 2011-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 26
[patent_no_of_words] => 9218
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 252
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13824286
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/824286 | Method for producing group III nitride semiconductor light-emitting device | Jul 11, 2011 | Issued |
Array
(
[id] => 10028800
[patent_doc_number] => 09070709
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-30
[patent_title] => 'Method for producing a field effect transistor with implantation through the spacers'
[patent_app_type] => utility
[patent_app_number] => 14/119395
[patent_app_country] => US
[patent_app_date] => 2011-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3411
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14119395
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/119395 | Method for producing a field effect transistor with implantation through the spacers | Jun 8, 2011 | Issued |
Array
(
[id] => 8289938
[patent_doc_number] => 20120178261
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-12
[patent_title] => 'SILICON-CONTAINING COMPOSITION HAVING SULFONAMIDE GROUP FOR FORMING RESIST UNDERLAYER FILM'
[patent_app_type] => utility
[patent_app_number] => 13/496768
[patent_app_country] => US
[patent_app_date] => 2010-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23289
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13496768
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/496768 | Silicon-containing composition having sulfonamide group for forming resist underlayer film | Sep 6, 2010 | Issued |