An T. Luu

Array ( [id] => 10495929 [patent_doc_number] => 20150380950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'WIRELESS POWER SUPPLY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/769260 [patent_app_country] => US [patent_app_date] => 2014-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9947 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14769260 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10349415 [patent_doc_number] => 20150234420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'Clock Switching Circuit' [patent_app_type] => utility [patent_app_number] => 14/183499 [patent_app_country] => US [patent_app_date] => 2014-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1640 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14183499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10337253 [patent_doc_number] => 20150222258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'COLLECTOR CURRENT DRIVER FOR A BIPOLAR JUNCTION TRANSISTOR TEMPERATURE TRANSDUCER' [patent_app_type] => utility [patent_app_number] => 14/172678 [patent_app_country] => US [patent_app_date] => 2014-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14172678 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9845225 [patent_doc_number] => 08947148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-03 [patent_title] => 'Hybrid analog/digital point-of-load controller' [patent_app_type] => utility [patent_app_number] => 14/162297 [patent_app_country] => US [patent_app_date] => 2014-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6846 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14162297 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10016664 [patent_doc_number] => 09059689 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-16 [patent_title] => 'Semiconductor device including flip-flop and logic circuit' [patent_app_type] => utility [patent_app_number] => 14/160774 [patent_app_country] => US [patent_app_date] => 2014-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 29 [patent_no_of_words] => 14538 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14160774 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12109528 [patent_doc_number] => 09866017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-09 [patent_title] => 'DC power generation system and protection method for DC power generation system' [patent_app_type] => utility [patent_app_number] => 14/911238 [patent_app_country] => US [patent_app_date] => 2014-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 6821 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14911238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10441207 [patent_doc_number] => 20150326219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-12 [patent_title] => 'DRIVING CIRCUIT FOR IGBT MODULE' [patent_app_type] => utility [patent_app_number] => 14/650574 [patent_app_country] => US [patent_app_date] => 2013-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4791 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14650574 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10303532 [patent_doc_number] => 20150188532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'CIRCUIT AND METHOD FOR OPERATING A HALF-BRIDGE' [patent_app_type] => utility [patent_app_number] => 14/142978 [patent_app_country] => US [patent_app_date] => 2013-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10931 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14142978 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10303527 [patent_doc_number] => 20150188527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'APPARATUS FOR A MONOTONIC DELAY LINE, METHOD FOR FAST LOCKING OF A DIGITAL DLL WITH CLOCK STOP/START TOLERANCE, APPARATUS AND METHOD FOR ROBUST CLOCK EDGE PLACEMENT, AND APPARATUS AND METHOD FOR CLOCK OFFSET TUNING' [patent_app_type] => utility [patent_app_number] => 14/142452 [patent_app_country] => US [patent_app_date] => 2013-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 16509 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14142452 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10300263 [patent_doc_number] => 20150185263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'LOCAL OSCILLATOR FREQUENCY CALIBRATION' [patent_app_type] => utility [patent_app_number] => 14/141021 [patent_app_country] => US [patent_app_date] => 2013-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9027 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14141021 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10294634 [patent_doc_number] => 20150179633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'Reverse Blocking Transistor Device' [patent_app_type] => utility [patent_app_number] => 14/138244 [patent_app_country] => US [patent_app_date] => 2013-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8838 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14138244 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9446878 [patent_doc_number] => 20140118047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'Method and Apparatus for Clock Transmission' [patent_app_type] => utility [patent_app_number] => 14/135626 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1953 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14135626 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10295460 [patent_doc_number] => 20150180459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'APPARATUS AND METHOD TO ACHIEVE CPAD MITIGATION EFFECTS' [patent_app_type] => utility [patent_app_number] => 14/136356 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5166 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14136356 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9845226 [patent_doc_number] => 08947149 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-02-03 [patent_title] => 'Stacked clock distribution for low power devices' [patent_app_type] => utility [patent_app_number] => 14/136137 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4808 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14136137 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10132728 [patent_doc_number] => 09166576 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-20 [patent_title] => 'Circuits and methods of automatically adjusting a discriminator threshold' [patent_app_type] => utility [patent_app_number] => 14/135542 [patent_app_country] => US [patent_app_date] => 2013-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5792 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14135542 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10538400 [patent_doc_number] => 09264040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Low leakage CMOS cell with low voltage swing' [patent_app_type] => utility [patent_app_number] => 14/134082 [patent_app_country] => US [patent_app_date] => 2013-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4355 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14134082 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9568123 [patent_doc_number] => 20140185836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'PULSE WIDTH MODULATOR AND SWITCHING AMPLIFIER' [patent_app_type] => utility [patent_app_number] => 14/132595 [patent_app_country] => US [patent_app_date] => 2013-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10936 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14132595 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10577641 [patent_doc_number] => 09300296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-29 [patent_title] => 'Level shifter circuit' [patent_app_type] => utility [patent_app_number] => 14/132751 [patent_app_country] => US [patent_app_date] => 2013-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 5163 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 359 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14132751 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9543182 [patent_doc_number] => 20140167829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'DELAY METHOD, CIRCUIT AND INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/109161 [patent_app_country] => US [patent_app_date] => 2013-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3773 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14109161 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10285762 [patent_doc_number] => 20150170760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-18 [patent_title] => 'Resistive Switching Sample and Hold' [patent_app_type] => utility [patent_app_number] => 14/108877 [patent_app_country] => US [patent_app_date] => 2013-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12677 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14108877 [rel_patent_id] =>[rel_patent_doc_number] =>)