An T. Luu

Array ( [id] => 8925992 [patent_doc_number] => 20130181752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-18 [patent_title] => 'TIMING CONTROL CIRCUIT FOR SWITCHING CAPACITOR DYNAMIC SWITCH AND CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/727381 [patent_app_country] => US [patent_app_date] => 2012-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4435 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13727381 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10444163 [patent_doc_number] => 20150329175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'ELECTRIC VEHICLE' [patent_app_type] => utility [patent_app_number] => 14/654898 [patent_app_country] => US [patent_app_date] => 2012-12-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8578 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14654898 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8948079 [patent_doc_number] => 20130193859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-01 [patent_title] => 'Apparatus, Circuit and Method for Automatic Phase-Shifting Pulse Width Modulated Signal Generation' [patent_app_type] => utility [patent_app_number] => 13/724649 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4494 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9390163 [patent_doc_number] => 08686773 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-04-01 [patent_title] => 'In-system margin measurement circuit' [patent_app_type] => utility [patent_app_number] => 13/721867 [patent_app_country] => US [patent_app_date] => 2012-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 7110 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13721867 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8914436 [patent_doc_number] => 20130176061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'Delay Locked Loop Circuit and Method' [patent_app_type] => utility [patent_app_number] => 13/718783 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 14695 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13718783 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9202986 [patent_doc_number] => 20140002163 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'SIGNAL TRANSMISSION CIRCUITS' [patent_app_type] => utility [patent_app_number] => 13/717580 [patent_app_country] => US [patent_app_date] => 2012-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9025 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13717580 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9202987 [patent_doc_number] => 20140002164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'DELAY CIRCUIT AND DELAY METHOD USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/716816 [patent_app_country] => US [patent_app_date] => 2012-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7607 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13716816 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9543181 [patent_doc_number] => 20140167828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'SMALL AREA LOW POWER DATA RETENTION FLOP' [patent_app_type] => utility [patent_app_number] => 13/715969 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2400 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715969 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9469939 [patent_doc_number] => 08723578 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-05-13 [patent_title] => 'Pulse generator circuit' [patent_app_type] => utility [patent_app_number] => 13/715675 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3150 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715675 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9189293 [patent_doc_number] => 20130328608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'Architecture for Adjusting Natural Frequency in Resonant Clock Distribution Networks' [patent_app_type] => utility [patent_app_number] => 13/714370 [patent_app_country] => US [patent_app_date] => 2012-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4647 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13714370 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8880713 [patent_doc_number] => 20130153897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'POWER BIPOLAR STRUCTURE, IN PARTICULAR FOR HIGH VOLTAGE APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 13/714013 [patent_app_country] => US [patent_app_date] => 2012-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4731 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13714013 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9202998 [patent_doc_number] => 20140002175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'Architecture for Single-Stepping in Resonant Clock Distribution Networks' [patent_app_type] => utility [patent_app_number] => 13/714371 [patent_app_country] => US [patent_app_date] => 2012-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5326 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13714371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9996849 [patent_doc_number] => 09041451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Resonant clock distribution network architecture for tracking parameter variations in conventional clock distribution networks' [patent_app_type] => utility [patent_app_number] => 13/714369 [patent_app_country] => US [patent_app_date] => 2012-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5315 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13714369 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10958787 [patent_doc_number] => 20140361812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-11 [patent_title] => 'DIRECT DIGITAL SYNTHESIZER, REFERENCE FREQUENCY GENERATING DEVICE, AND SINE WAVE OUTPUTTING METHOD' [patent_app_type] => utility [patent_app_number] => 14/366423 [patent_app_country] => US [patent_app_date] => 2012-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4925 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14366423 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10087889 [patent_doc_number] => 09125249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-01 [patent_title] => 'Pixel circuit and method for driving thereof, and organic light emitting display device using the same' [patent_app_type] => utility [patent_app_number] => 13/709235 [patent_app_country] => US [patent_app_date] => 2012-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 14421 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13709235 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9184710 [patent_doc_number] => 08624651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-07 [patent_title] => 'Interpolation circuit and receiving circuit' [patent_app_type] => utility [patent_app_number] => 13/709481 [patent_app_country] => US [patent_app_date] => 2012-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 30 [patent_no_of_words] => 7821 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13709481 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8914438 [patent_doc_number] => 20130176063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'SEMICONDUCTOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/693862 [patent_app_country] => US [patent_app_date] => 2012-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 14740 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13693862 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8753864 [patent_doc_number] => 20130088168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-11 [patent_title] => 'COMMISSION OF DISTRIBUTED LIGHT FIXTURES OF A LIGHTING SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/691562 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5360 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13691562 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10179564 [patent_doc_number] => 09209787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'Semiconductor device controllers' [patent_app_type] => utility [patent_app_number] => 14/367311 [patent_app_country] => US [patent_app_date] => 2012-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 8853 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 365 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14367311 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9246196 [patent_doc_number] => 08610481 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-17 [patent_title] => 'Discrete signal consolidation device and method and aircraft with said device' [patent_app_type] => utility [patent_app_number] => 13/671655 [patent_app_country] => US [patent_app_date] => 2012-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 1689 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13671655 [rel_patent_id] =>[rel_patent_doc_number] =>)