Search

An T. Luu

Examiner (ID: 5797, Phone: (571)272-1746 , Office: P/2842 )

Most Active Art Unit
2816
Art Unit(s)
2502, 2816, 2842
Total Applications
2105
Issued Applications
1967
Pending Applications
23
Abandoned Applications
118

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8732163 [patent_doc_number] => 20130077733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'Circuit Configuration And Method For Distributing Pulses Within A Time Interval' [patent_app_type] => utility [patent_app_number] => 13/637159 [patent_app_country] => US [patent_app_date] => 2011-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2743 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13637159 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/637159
Circuit configuration and method for distributing pulses within a time interval Mar 15, 2011 Issued
Array ( [id] => 8835278 [patent_doc_number] => 08451037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-28 [patent_title] => 'Duty cycle correction circuit' [patent_app_type] => utility [patent_app_number] => 13/048185 [patent_app_country] => US [patent_app_date] => 2011-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5111 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13048185 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/048185
Duty cycle correction circuit Mar 14, 2011 Issued
Array ( [id] => 6100155 [patent_doc_number] => 20110164007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-07 [patent_title] => 'Delay circuit, semiconductor control circuit, display device and electronic device' [patent_app_type] => utility [patent_app_number] => 13/064219 [patent_app_country] => US [patent_app_date] => 2011-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 11585 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20110164007.pdf [firstpage_image] =>[orig_patent_app_number] => 13064219 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/064219
Delay circuit, semiconductor control circuit, display device and electronic device Mar 10, 2011 Issued
Array ( [id] => 8750154 [patent_doc_number] => 08415988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'Clock driver for a capacitance clock input' [patent_app_type] => utility [patent_app_number] => 13/043809 [patent_app_country] => US [patent_app_date] => 2011-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3742 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13043809 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/043809
Clock driver for a capacitance clock input Mar 8, 2011 Issued
Array ( [id] => 8380131 [patent_doc_number] => 20120223754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-06 [patent_title] => 'DELAY CIRCUITRY' [patent_app_type] => utility [patent_app_number] => 13/041309 [patent_app_country] => US [patent_app_date] => 2011-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7714 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13041309 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/041309
Delay circuitry Mar 3, 2011 Issued
Array ( [id] => 8739063 [patent_doc_number] => 08410839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-02 [patent_title] => 'Systems and methods for driving high power states using lower voltage processes' [patent_app_type] => utility [patent_app_number] => 13/041065 [patent_app_country] => US [patent_app_date] => 2011-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5576 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13041065 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/041065
Systems and methods for driving high power states using lower voltage processes Mar 3, 2011 Issued
Array ( [id] => 8070527 [patent_doc_number] => 20110241760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'CONTROL CIRCUIT, CONTROL DEVICE, CONTROL METHOD, AND IMAGE FORMING APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/040870 [patent_app_country] => US [patent_app_date] => 2011-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6429 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20110241760.pdf [firstpage_image] =>[orig_patent_app_number] => 13040870 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/040870
Control circuit, control device, control method, and image forming apparatus Mar 3, 2011 Issued
Array ( [id] => 8544242 [patent_doc_number] => 08319537 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-27 [patent_title] => 'Modulation profile generator and spread spectrum clock generator including the same' [patent_app_type] => utility [patent_app_number] => 13/034002 [patent_app_country] => US [patent_app_date] => 2011-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5391 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13034002 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/034002
Modulation profile generator and spread spectrum clock generator including the same Feb 23, 2011 Issued
Array ( [id] => 7815660 [patent_doc_number] => 20120062280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'OUTPUT DRIVER' [patent_app_type] => utility [patent_app_number] => 13/034328 [patent_app_country] => US [patent_app_date] => 2011-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8727 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20120062280.pdf [firstpage_image] =>[orig_patent_app_number] => 13034328 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/034328
Output driver Feb 23, 2011 Issued
Array ( [id] => 8357111 [patent_doc_number] => 20120212265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-23 [patent_title] => 'DELAY CELL FOR CLOCK SIGNALS' [patent_app_type] => utility [patent_app_number] => 13/032326 [patent_app_country] => US [patent_app_date] => 2011-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7698 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13032326 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/032326
Delay cell for clock signals Feb 21, 2011 Issued
Array ( [id] => 6076232 [patent_doc_number] => 20110140759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'PHASE MIXER WITH ADJUSTABLE LOAD-TO-DRIVE RATIO' [patent_app_type] => utility [patent_app_number] => 13/029986 [patent_app_country] => US [patent_app_date] => 2011-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3891 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20110140759.pdf [firstpage_image] =>[orig_patent_app_number] => 13029986 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/029986
Phase mixer with adjustable load-to-drive ratio Feb 16, 2011 Issued
Array ( [id] => 8534139 [patent_doc_number] => 08310297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-13 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/929753 [patent_app_country] => US [patent_app_date] => 2011-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6160 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12929753 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929753
Semiconductor device Feb 13, 2011 Issued
Array ( [id] => 8422504 [patent_doc_number] => 08278993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-02 [patent_title] => 'Clock distribution network' [patent_app_type] => utility [patent_app_number] => 13/025777 [patent_app_country] => US [patent_app_date] => 2011-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6287 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13025777 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/025777
Clock distribution network Feb 10, 2011 Issued
Array ( [id] => 6076227 [patent_doc_number] => 20110140754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'REFERENCE FREQUENCY GENERATION CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT, AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 13/022029 [patent_app_country] => US [patent_app_date] => 2011-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 9786 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20110140754.pdf [firstpage_image] =>[orig_patent_app_number] => 13022029 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/022029
Reference frequency generation circuit, semiconductor integrated circuit, and electronic device Feb 6, 2011 Issued
Array ( [id] => 8333629 [patent_doc_number] => 20120200338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'Dynamic Biasing Systems and Methods' [patent_app_type] => utility [patent_app_number] => 13/021411 [patent_app_country] => US [patent_app_date] => 2011-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4500 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13021411 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/021411
Dynamic biasing systems and methods Feb 3, 2011 Issued
Array ( [id] => 8321849 [patent_doc_number] => 20120194255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'MULTIVOLTAGE CLOCK SYNCHRONIZATION' [patent_app_type] => utility [patent_app_number] => 13/019950 [patent_app_country] => US [patent_app_date] => 2011-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2264 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13019950 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/019950
Multivoltage clock synchronization Feb 1, 2011 Issued
Array ( [id] => 6106893 [patent_doc_number] => 20110187434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-04 [patent_title] => 'SWITCHABLE CAPACITIVE ELEMENT WITH IMPROVED QUALITY FACTOR, AND METHOD OF PRODUCTION' [patent_app_type] => utility [patent_app_number] => 13/017159 [patent_app_country] => US [patent_app_date] => 2011-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3380 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20110187434.pdf [firstpage_image] =>[orig_patent_app_number] => 13017159 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/017159
Switchable capacitive element with improved quality factor, and method of production Jan 30, 2011 Issued
Array ( [id] => 8299497 [patent_doc_number] => 20120182057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'POWER SUPPLY INDUCED SIGNAL JITTER COMPENSATION' [patent_app_type] => utility [patent_app_number] => 13/006111 [patent_app_country] => US [patent_app_date] => 2011-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4555 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13006111 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/006111
Power supply induced signal jitter compensation Jan 12, 2011 Issued
Array ( [id] => 7482302 [patent_doc_number] => 20110234263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'DRIVER AND OUTPUT BUFFER CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/987095 [patent_app_country] => US [patent_app_date] => 2011-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4727 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20110234263.pdf [firstpage_image] =>[orig_patent_app_number] => 12987095 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/987095
Driver and output buffer circuit Jan 7, 2011 Issued
Array ( [id] => 8329377 [patent_doc_number] => 08237483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Processing clock signals' [patent_app_type] => utility [patent_app_number] => 12/982593 [patent_app_country] => US [patent_app_date] => 2010-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3406 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12982593 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/982593
Processing clock signals Dec 29, 2010 Issued
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