
An T. Luu
Examiner (ID: 5797, Phone: (571)272-1746 , Office: P/2842 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2502, 2816, 2842 |
| Total Applications | 2105 |
| Issued Applications | 1967 |
| Pending Applications | 23 |
| Abandoned Applications | 118 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6184817
[patent_doc_number] => 20110169542
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-07-14
[patent_title] => 'DELAY CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS AND METHOD FOR DELAYING'
[patent_app_type] => utility
[patent_app_number] => 12/839352
[patent_app_country] => US
[patent_app_date] => 2010-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4123
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0169/20110169542.pdf
[firstpage_image] =>[orig_patent_app_number] => 12839352
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/839352 | DELAY CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS AND METHOD FOR DELAYING | Jul 18, 2010 | Abandoned |
Array
(
[id] => 4635192
[patent_doc_number] => 08013648
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-09-06
[patent_title] => 'Output slew-rate controlled interface and method for controlling the output slew-rate of an interface'
[patent_app_type] => utility
[patent_app_number] => 12/835166
[patent_app_country] => US
[patent_app_date] => 2010-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3715
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/013/08013648.pdf
[firstpage_image] =>[orig_patent_app_number] => 12835166
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/835166 | Output slew-rate controlled interface and method for controlling the output slew-rate of an interface | Jul 12, 2010 | Issued |
Array
(
[id] => 8083409
[patent_doc_number] => 08149026
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-04-03
[patent_title] => 'Driver circuit and adjustment method therefor'
[patent_app_type] => utility
[patent_app_number] => 12/826317
[patent_app_country] => US
[patent_app_date] => 2010-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7711
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/149/08149026.pdf
[firstpage_image] =>[orig_patent_app_number] => 12826317
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/826317 | Driver circuit and adjustment method therefor | Jun 28, 2010 | Issued |
Array
(
[id] => 6131737
[patent_doc_number] => 20110006826
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-13
[patent_title] => 'PHASE SIGNAL GENERATING APPARATUSES'
[patent_app_type] => utility
[patent_app_number] => 12/820527
[patent_app_country] => US
[patent_app_date] => 2010-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 15952
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0006/20110006826.pdf
[firstpage_image] =>[orig_patent_app_number] => 12820527
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/820527 | Phase signal generating apparatuses | Jun 21, 2010 | Issued |
Array
(
[id] => 8797786
[patent_doc_number] => 08436663
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-05-07
[patent_title] => 'Low-current input buffer'
[patent_app_type] => utility
[patent_app_number] => 13/322367
[patent_app_country] => US
[patent_app_date] => 2010-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4191
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 324
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13322367
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/322367 | Low-current input buffer | Jun 20, 2010 | Issued |
Array
(
[id] => 6287268
[patent_doc_number] => 20100237904
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-23
[patent_title] => 'High Performance Output Drivers and Anti-Reflection Circuits'
[patent_app_type] => utility
[patent_app_number] => 12/795005
[patent_app_country] => US
[patent_app_date] => 2010-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 22213
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0237/20100237904.pdf
[firstpage_image] =>[orig_patent_app_number] => 12795005
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/795005 | High Performance Output Drivers and Anti-Reflection Circuits | Jun 6, 2010 | Abandoned |
Array
(
[id] => 6287331
[patent_doc_number] => 20100237922
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-23
[patent_title] => 'CLOCK GENERATING CIRCUIT AND CLOCK GENERATING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/795132
[patent_app_country] => US
[patent_app_date] => 2010-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6291
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0237/20100237922.pdf
[firstpage_image] =>[orig_patent_app_number] => 12795132
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/795132 | Clock generating circuit and clock generating method thereof | Jun 6, 2010 | Issued |
Array
(
[id] => 6539479
[patent_doc_number] => 20100271097
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-28
[patent_title] => 'Pulse Width Modulation Sequence Maintaining Maximally Flat Voltage During Current Transients'
[patent_app_type] => utility
[patent_app_number] => 12/781724
[patent_app_country] => US
[patent_app_date] => 2010-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6193
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0271/20100271097.pdf
[firstpage_image] =>[orig_patent_app_number] => 12781724
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/781724 | Pulse width modulation sequence maintaining maximally flat voltage during current transients | May 16, 2010 | Issued |
Array
(
[id] => 7519482
[patent_doc_number] => 07973585
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-07-05
[patent_title] => 'Driver circuit'
[patent_app_type] => utility
[patent_app_number] => 12/662770
[patent_app_country] => US
[patent_app_date] => 2010-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 13700
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/973/07973585.pdf
[firstpage_image] =>[orig_patent_app_number] => 12662770
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/662770 | Driver circuit | May 2, 2010 | Issued |
Array
(
[id] => 9010263
[patent_doc_number] => 08525567
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-09-03
[patent_title] => 'Pipeline circuit, semiconductor device, and pipeline control method'
[patent_app_type] => utility
[patent_app_number] => 13/380006
[patent_app_country] => US
[patent_app_date] => 2010-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 15
[patent_no_of_words] => 19928
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13380006
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/380006 | Pipeline circuit, semiconductor device, and pipeline control method | Apr 27, 2010 | Issued |
Array
(
[id] => 4489952
[patent_doc_number] => 07884660
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-08
[patent_title] => 'Variable-length digitally-controlled delay chain with interpolation-based tuning'
[patent_app_type] => utility
[patent_app_number] => 12/767092
[patent_app_country] => US
[patent_app_date] => 2010-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 8428
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/884/07884660.pdf
[firstpage_image] =>[orig_patent_app_number] => 12767092
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/767092 | Variable-length digitally-controlled delay chain with interpolation-based tuning | Apr 25, 2010 | Issued |
Array
(
[id] => 6231926
[patent_doc_number] => 20100264957
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-21
[patent_title] => 'OUTPUT CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/763753
[patent_app_country] => US
[patent_app_date] => 2010-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 9573
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0264/20100264957.pdf
[firstpage_image] =>[orig_patent_app_number] => 12763753
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/763753 | OUTPUT CIRCUIT | Apr 19, 2010 | Abandoned |
Array
(
[id] => 6539581
[patent_doc_number] => 20100271102
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-28
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 12/662357
[patent_app_country] => US
[patent_app_date] => 2010-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7426
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0271/20100271102.pdf
[firstpage_image] =>[orig_patent_app_number] => 12662357
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/662357 | Semiconductor integrated circuit | Apr 12, 2010 | Issued |
Array
(
[id] => 6315967
[patent_doc_number] => 20100195258
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-05
[patent_title] => 'Voltage Disturbance And Harmonics Monitor'
[patent_app_type] => utility
[patent_app_number] => 12/755151
[patent_app_country] => US
[patent_app_date] => 2010-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 6086
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0195/20100195258.pdf
[firstpage_image] =>[orig_patent_app_number] => 12755151
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/755151 | Voltage disturbance and harmonics monitor | Apr 5, 2010 | Issued |
Array
(
[id] => 6265182
[patent_doc_number] => 20100253316
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-07
[patent_title] => 'Current control circuit'
[patent_app_type] => utility
[patent_app_number] => 12/662043
[patent_app_country] => US
[patent_app_date] => 2010-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4948
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0253/20100253316.pdf
[firstpage_image] =>[orig_patent_app_number] => 12662043
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/662043 | Current control circuit | Mar 28, 2010 | Issued |
Array
(
[id] => 4497160
[patent_doc_number] => 07956655
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-06-07
[patent_title] => 'Output pad system and pad driving circuit thereof'
[patent_app_type] => utility
[patent_app_number] => 12/659884
[patent_app_country] => US
[patent_app_date] => 2010-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2309
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/956/07956655.pdf
[firstpage_image] =>[orig_patent_app_number] => 12659884
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/659884 | Output pad system and pad driving circuit thereof | Mar 23, 2010 | Issued |
Array
(
[id] => 8083435
[patent_doc_number] => 08149038
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-04-03
[patent_title] => 'Techniques for phase adjustment'
[patent_app_type] => utility
[patent_app_number] => 12/729114
[patent_app_country] => US
[patent_app_date] => 2010-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 17
[patent_no_of_words] => 12764
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/149/08149038.pdf
[firstpage_image] =>[orig_patent_app_number] => 12729114
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/729114 | Techniques for phase adjustment | Mar 21, 2010 | Issued |
Array
(
[id] => 4619877
[patent_doc_number] => 07999598
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-08-16
[patent_title] => 'High-voltage-tolerant linear scale-down circuit using low-voltage device'
[patent_app_type] => utility
[patent_app_number] => 12/727047
[patent_app_country] => US
[patent_app_date] => 2010-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3466
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/999/07999598.pdf
[firstpage_image] =>[orig_patent_app_number] => 12727047
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/727047 | High-voltage-tolerant linear scale-down circuit using low-voltage device | Mar 17, 2010 | Issued |
Array
(
[id] => 6324528
[patent_doc_number] => 20100244930
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-30
[patent_title] => 'SEMICONDUCTOR DEVICE FOR OUTPUT OF PULSE WAVEFORMS'
[patent_app_type] => utility
[patent_app_number] => 12/724443
[patent_app_country] => US
[patent_app_date] => 2010-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 9009
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0244/20100244930.pdf
[firstpage_image] =>[orig_patent_app_number] => 12724443
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/724443 | Semiconductor device for output of pulse waveforms | Mar 15, 2010 | Issued |
Array
(
[id] => 8306554
[patent_doc_number] => 08228097
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-07-24
[patent_title] => 'Circuit for driving a display panel using a driving capacitor'
[patent_app_type] => utility
[patent_app_number] => 12/716475
[patent_app_country] => US
[patent_app_date] => 2010-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1473
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12716475
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/716475 | Circuit for driving a display panel using a driving capacitor | Mar 2, 2010 | Issued |