
An T. Luu
Examiner (ID: 5797, Phone: (571)272-1746 , Office: P/2842 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2502, 2816, 2842 |
| Total Applications | 2105 |
| Issued Applications | 1967 |
| Pending Applications | 23 |
| Abandoned Applications | 118 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4830344
[patent_doc_number] => 20080129348
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-05
[patent_title] => 'HIGH PERFORMANCE LOW POWER MULTIPLE-LEVEL-SWITCHING OUTPUT DRIVERS'
[patent_app_type] => utility
[patent_app_number] => 12/029928
[patent_app_country] => US
[patent_app_date] => 2008-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 16399
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0129/20080129348.pdf
[firstpage_image] =>[orig_patent_app_number] => 12029928
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/029928 | HIGH PERFORMANCE LOW POWER MULTIPLE-LEVEL-SWITCHING OUTPUT DRIVERS | Feb 11, 2008 | Abandoned |
Array
(
[id] => 256908
[patent_doc_number] => 07576586
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-18
[patent_title] => 'Common-mode charge control in a pipelined charge-domain signal-processing circuit'
[patent_app_type] => utility
[patent_app_number] => 12/069433
[patent_app_country] => US
[patent_app_date] => 2008-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 8686
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/576/07576586.pdf
[firstpage_image] =>[orig_patent_app_number] => 12069433
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/069433 | Common-mode charge control in a pipelined charge-domain signal-processing circuit | Feb 7, 2008 | Issued |
Array
(
[id] => 4560510
[patent_doc_number] => 07821325
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-26
[patent_title] => 'Charge pump converter and method therefor'
[patent_app_type] => utility
[patent_app_number] => 12/161387
[patent_app_country] => US
[patent_app_date] => 2008-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4449
[patent_no_of_claims] => 19
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[patent_words_short_claim] => 90
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/821/07821325.pdf
[firstpage_image] =>[orig_patent_app_number] => 12161387
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/161387 | Charge pump converter and method therefor | Jan 30, 2008 | Issued |
Array
(
[id] => 4500815
[patent_doc_number] => 07948275
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-24
[patent_title] => 'Transceiver with fault tolerant driver'
[patent_app_type] => utility
[patent_app_number] => 11/971682
[patent_app_country] => US
[patent_app_date] => 2008-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4220
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/948/07948275.pdf
[firstpage_image] =>[orig_patent_app_number] => 11971682
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/971682 | Transceiver with fault tolerant driver | Jan 8, 2008 | Issued |
Array
(
[id] => 6403950
[patent_doc_number] => 20100148834
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-06-17
[patent_title] => 'ENHANCED PREDISTORTION FOR SLEWING CORRECTION'
[patent_app_type] => utility
[patent_app_number] => 12/448827
[patent_app_country] => US
[patent_app_date] => 2008-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3972
[patent_no_of_claims] => 10
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0148/20100148834.pdf
[firstpage_image] =>[orig_patent_app_number] => 12448827
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/448827 | Enhanced predistortion for slewing correction | Jan 3, 2008 | Issued |
Array
(
[id] => 4715978
[patent_doc_number] => 20080238500
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-02
[patent_title] => 'Power-up signal generating circuit and method for driving the same'
[patent_app_type] => utility
[patent_app_number] => 12/003677
[patent_app_country] => US
[patent_app_date] => 2007-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3645
[patent_no_of_claims] => 19
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0238/20080238500.pdf
[firstpage_image] =>[orig_patent_app_number] => 12003677
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/003677 | Power-up signal generating circuit and method for driving the same | Dec 30, 2007 | Issued |
Array
(
[id] => 152887
[patent_doc_number] => 07683696
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-03-23
[patent_title] => 'Open-drain output buffer for single-voltage-supply CMOS'
[patent_app_type] => utility
[patent_app_number] => 11/964467
[patent_app_country] => US
[patent_app_date] => 2007-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 5252
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 250
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/683/07683696.pdf
[firstpage_image] =>[orig_patent_app_number] => 11964467
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/964467 | Open-drain output buffer for single-voltage-supply CMOS | Dec 25, 2007 | Issued |
Array
(
[id] => 267590
[patent_doc_number] => 07567117
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-28
[patent_title] => 'Data output clock signal generating apparatus and semiconductor integrated circuit with the same'
[patent_app_type] => utility
[patent_app_number] => 11/961665
[patent_app_country] => US
[patent_app_date] => 2007-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 6028
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/567/07567117.pdf
[firstpage_image] =>[orig_patent_app_number] => 11961665
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/961665 | Data output clock signal generating apparatus and semiconductor integrated circuit with the same | Dec 19, 2007 | Issued |
Array
(
[id] => 260572
[patent_doc_number] => 07573302
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-11
[patent_title] => 'Differential signal comparator'
[patent_app_type] => utility
[patent_app_number] => 11/961682
[patent_app_country] => US
[patent_app_date] => 2007-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 2933
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/573/07573302.pdf
[firstpage_image] =>[orig_patent_app_number] => 11961682
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/961682 | Differential signal comparator | Dec 19, 2007 | Issued |
Array
(
[id] => 256903
[patent_doc_number] => 07576581
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-18
[patent_title] => 'Circuit and method for correcting duty cycle'
[patent_app_type] => utility
[patent_app_number] => 11/961931
[patent_app_country] => US
[patent_app_date] => 2007-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 7639
[patent_no_of_claims] => 25
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/576/07576581.pdf
[firstpage_image] =>[orig_patent_app_number] => 11961931
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/961931 | Circuit and method for correcting duty cycle | Dec 19, 2007 | Issued |
Array
(
[id] => 5499805
[patent_doc_number] => 20090160493
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-25
[patent_title] => 'System and Method for Generating a Spread-Spectrum Clock Signal'
[patent_app_type] => utility
[patent_app_number] => 11/960840
[patent_app_country] => US
[patent_app_date] => 2007-12-20
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0160/20090160493.pdf
[firstpage_image] =>[orig_patent_app_number] => 11960840
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/960840 | System and Method for Generating a Spread-Spectrum Clock Signal | Dec 19, 2007 | Abandoned |
Array
(
[id] => 163595
[patent_doc_number] => 07671635
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-02
[patent_title] => 'Frequency synthesizer, coupled divide-by-N circuit, current-reuse multiply-by-M circuit'
[patent_app_type] => utility
[patent_app_number] => 11/961130
[patent_app_country] => US
[patent_app_date] => 2007-12-20
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[pdf_file] => patents/07/671/07671635.pdf
[firstpage_image] =>[orig_patent_app_number] => 11961130
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/961130 | Frequency synthesizer, coupled divide-by-N circuit, current-reuse multiply-by-M circuit | Dec 19, 2007 | Issued |
Array
(
[id] => 114332
[patent_doc_number] => 07714632
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-05-11
[patent_title] => 'Clock control circuit and semiconductor integrated circuit using the same'
[patent_app_type] => utility
[patent_app_number] => 11/962033
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[pdf_file] => patents/07/714/07714632.pdf
[firstpage_image] =>[orig_patent_app_number] => 11962033
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/962033 | Clock control circuit and semiconductor integrated circuit using the same | Dec 19, 2007 | Issued |
Array
(
[id] => 5499827
[patent_doc_number] => 20090160515
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-25
[patent_title] => 'Auto-tracking clock circuitry'
[patent_app_type] => utility
[patent_app_number] => 11/959907
[patent_app_country] => US
[patent_app_date] => 2007-12-19
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0160/20090160515.pdf
[firstpage_image] =>[orig_patent_app_number] => 11959907
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/959907 | Auto-tracking clock circuitry | Dec 18, 2007 | Abandoned |
Array
(
[id] => 4925560
[patent_doc_number] => 20080164923
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-10
[patent_title] => 'DELAY CIRCUIT AND ELECTRONIC DEVICE INCLUDING DELAY CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 11/958859
[patent_app_country] => US
[patent_app_date] => 2007-12-18
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0164/20080164923.pdf
[firstpage_image] =>[orig_patent_app_number] => 11958859
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/958859 | Delay circuit and electronic device including delay circuit | Dec 17, 2007 | Issued |
Array
(
[id] => 4661442
[patent_doc_number] => 20080252349
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-16
[patent_title] => 'DUTY CYCLE CORRECTING CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 11/959368
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[pdf_file] => publications/A1/0252/20080252349.pdf
[firstpage_image] =>[orig_patent_app_number] => 11959368
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/959368 | Duty cycle correcting circuit | Dec 17, 2007 | Issued |
Array
(
[id] => 152880
[patent_doc_number] => 07683691
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-23
[patent_title] => 'Clock supplying apparatus'
[patent_app_type] => utility
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/683/07683691.pdf
[firstpage_image] =>[orig_patent_app_number] => 12000481
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/000481 | Clock supplying apparatus | Dec 12, 2007 | Issued |
Array
(
[id] => 197908
[patent_doc_number] => 07639062
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-29
[patent_title] => 'Electronic device and communication device comprising the same'
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[pdf_file] => patents/07/639/07639062.pdf
[firstpage_image] =>[orig_patent_app_number] => 11949363
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/949363 | Electronic device and communication device comprising the same | Dec 2, 2007 | Issued |
Array
(
[id] => 4953040
[patent_doc_number] => 20080186064
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-07
[patent_title] => 'Digital Programmable Frequency Divider'
[patent_app_type] => utility
[patent_app_number] => 11/943798
[patent_app_country] => US
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[pdf_file] => publications/A1/0186/20080186064.pdf
[firstpage_image] =>[orig_patent_app_number] => 11943798
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/943798 | Digital programmable frequency divider | Nov 20, 2007 | Issued |
Array
(
[id] => 5262799
[patent_doc_number] => 20090115484
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-07
[patent_title] => 'DIGITALLY CONTROLLED DELAY ELEMENT'
[patent_app_type] => utility
[patent_app_number] => 11/933875
[patent_app_country] => US
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0115/20090115484.pdf
[firstpage_image] =>[orig_patent_app_number] => 11933875
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/933875 | DIGITALLY CONTROLLED DELAY ELEMENT | Oct 31, 2007 | Abandoned |