Search

An T. Luu

Examiner (ID: 5797, Phone: (571)272-1746 , Office: P/2842 )

Most Active Art Unit
2816
Art Unit(s)
2502, 2816, 2842
Total Applications
2105
Issued Applications
1967
Pending Applications
23
Abandoned Applications
118

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4897204 [patent_doc_number] => 20080116817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-22 [patent_title] => 'CONTROLLING APPARATUS FOR CONTROLLING A PLURALITY OF LED STRINGS AND RELATED LIGHT MODULES' [patent_app_type] => utility [patent_app_number] => 11/672514 [patent_app_country] => US [patent_app_date] => 2007-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2988 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20080116817.pdf [firstpage_image] =>[orig_patent_app_number] => 11672514 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/672514
Controlling apparatus for controlling a plurality of LED strings and related light modules Feb 6, 2007 Issued
Array ( [id] => 5246173 [patent_doc_number] => 20070242407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'Semiconductor device having output transistor and current control circuit' [patent_app_type] => utility [patent_app_number] => 11/702504 [patent_app_country] => US [patent_app_date] => 2007-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11665 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20070242407.pdf [firstpage_image] =>[orig_patent_app_number] => 11702504 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/702504
Semiconductor device having output transistor and current control circuit Feb 5, 2007 Issued
Array ( [id] => 573009 [patent_doc_number] => 07466168 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-12-16 [patent_title] => 'Floating gate drive circuits' [patent_app_type] => utility [patent_app_number] => 11/670030 [patent_app_country] => US [patent_app_date] => 2007-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2056 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/466/07466168.pdf [firstpage_image] =>[orig_patent_app_number] => 11670030 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/670030
Floating gate drive circuits Jan 31, 2007 Issued
Array ( [id] => 429174 [patent_doc_number] => 07268612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-11 [patent_title] => 'Semiconductor device with pump circuit' [patent_app_type] => utility [patent_app_number] => 11/699427 [patent_app_country] => US [patent_app_date] => 2007-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 25 [patent_no_of_words] => 16896 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/268/07268612.pdf [firstpage_image] =>[orig_patent_app_number] => 11699427 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/699427
Semiconductor device with pump circuit Jan 29, 2007 Issued
Array ( [id] => 409150 [patent_doc_number] => 07285997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-23 [patent_title] => 'Delay locked loop circuit and method' [patent_app_type] => utility [patent_app_number] => 11/699268 [patent_app_country] => US [patent_app_date] => 2007-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 11949 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/285/07285997.pdf [firstpage_image] =>[orig_patent_app_number] => 11699268 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/699268
Delay locked loop circuit and method Jan 28, 2007 Issued
Array ( [id] => 583967 [patent_doc_number] => 07456673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-25 [patent_title] => 'Multi-phase clock generator' [patent_app_type] => utility [patent_app_number] => 11/625541 [patent_app_country] => US [patent_app_date] => 2007-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3212 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/456/07456673.pdf [firstpage_image] =>[orig_patent_app_number] => 11625541 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/625541
Multi-phase clock generator Jan 21, 2007 Issued
Array ( [id] => 5157925 [patent_doc_number] => 20070170969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'ELECTRONIC SYSTEM HAVING A CLOCK SIGNAL CORRECTING DEVICE' [patent_app_type] => utility [patent_app_number] => 11/624918 [patent_app_country] => US [patent_app_date] => 2007-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10607 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20070170969.pdf [firstpage_image] =>[orig_patent_app_number] => 11624918 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/624918
ELECTRONIC SYSTEM HAVING A CLOCK SIGNAL CORRECTING DEVICE Jan 18, 2007 Abandoned
Array ( [id] => 5093427 [patent_doc_number] => 20070115036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-24 [patent_title] => 'Generating multi-phase clock signals using hierarchical delays' [patent_app_type] => utility [patent_app_number] => 11/652939 [patent_app_country] => US [patent_app_date] => 2007-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3676 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20070115036.pdf [firstpage_image] =>[orig_patent_app_number] => 11652939 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/652939
Generating multi-phase clock signals using hierarchical delays Jan 11, 2007 Issued
Array ( [id] => 583949 [patent_doc_number] => 07456671 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-25 [patent_title] => 'Hierarchical scalable high resolution digital programmable delay circuit' [patent_app_type] => utility [patent_app_number] => 11/622004 [patent_app_country] => US [patent_app_date] => 2007-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 4048 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/456/07456671.pdf [firstpage_image] =>[orig_patent_app_number] => 11622004 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/622004
Hierarchical scalable high resolution digital programmable delay circuit Jan 10, 2007 Issued
Array ( [id] => 5187168 [patent_doc_number] => 20070165476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-19 [patent_title] => 'CLOCK SIGNAL GENERATING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/621025 [patent_app_country] => US [patent_app_date] => 2007-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3571 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0165/20070165476.pdf [firstpage_image] =>[orig_patent_app_number] => 11621025 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/621025
CLOCK SIGNAL GENERATING CIRCUIT Jan 7, 2007 Abandoned
Array ( [id] => 4969032 [patent_doc_number] => 20070109034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/649766 [patent_app_country] => US [patent_app_date] => 2007-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 8071 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20070109034.pdf [firstpage_image] =>[orig_patent_app_number] => 11649766 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/649766
Semiconductor device Jan 4, 2007 Issued
Array ( [id] => 4925567 [patent_doc_number] => 20080164930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-10 [patent_title] => 'Phase interpolation apparatus, systems, and methods' [patent_app_type] => utility [patent_app_number] => 11/649434 [patent_app_country] => US [patent_app_date] => 2007-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6063 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20080164930.pdf [firstpage_image] =>[orig_patent_app_number] => 11649434 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/649434
Phase interpolation apparatus, systems, and methods Jan 3, 2007 Issued
Array ( [id] => 353179 [patent_doc_number] => 07492205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-17 [patent_title] => 'Clock generator' [patent_app_type] => utility [patent_app_number] => 11/649206 [patent_app_country] => US [patent_app_date] => 2007-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3882 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/492/07492205.pdf [firstpage_image] =>[orig_patent_app_number] => 11649206 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/649206
Clock generator Jan 3, 2007 Issued
Array ( [id] => 5175591 [patent_doc_number] => 20070176649 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-02 [patent_title] => 'CIRCUIT FOR DIFFERENTIAL SIGNALS' [patent_app_type] => utility [patent_app_number] => 11/619819 [patent_app_country] => US [patent_app_date] => 2007-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6002 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20070176649.pdf [firstpage_image] =>[orig_patent_app_number] => 11619819 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/619819
Circuit for differential signals Jan 3, 2007 Issued
Array ( [id] => 4925565 [patent_doc_number] => 20080164928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-10 [patent_title] => 'Phase interpolation apparatus, systems, and methods' [patent_app_type] => utility [patent_app_number] => 11/649435 [patent_app_country] => US [patent_app_date] => 2007-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6444 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20080164928.pdf [firstpage_image] =>[orig_patent_app_number] => 11649435 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/649435
Phase interpolation apparatus, systems, and methods Jan 3, 2007 Issued
Array ( [id] => 853773 [patent_doc_number] => 07378883 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-05-27 [patent_title] => 'Source follower and electronic system utilizing the same' [patent_app_type] => utility [patent_app_number] => 11/619220 [patent_app_country] => US [patent_app_date] => 2007-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1912 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/378/07378883.pdf [firstpage_image] =>[orig_patent_app_number] => 11619220 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/619220
Source follower and electronic system utilizing the same Jan 2, 2007 Issued
Array ( [id] => 205030 [patent_doc_number] => 07634027 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-15 [patent_title] => 'Method and system for independent I and Q loop amplitude control for quadrature generators' [patent_app_type] => utility [patent_app_number] => 11/618719 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8772 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/634/07634027.pdf [firstpage_image] =>[orig_patent_app_number] => 11618719 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618719
Method and system for independent I and Q loop amplitude control for quadrature generators Dec 28, 2006 Issued
Array ( [id] => 289489 [patent_doc_number] => 07548106 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-16 [patent_title] => 'Internal read signal generator and semiconductor memory device having the same' [patent_app_type] => utility [patent_app_number] => 11/647646 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2756 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/548/07548106.pdf [firstpage_image] =>[orig_patent_app_number] => 11647646 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647646
Internal read signal generator and semiconductor memory device having the same Dec 28, 2006 Issued
Array ( [id] => 296578 [patent_doc_number] => 07541852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-02 [patent_title] => 'Self-correcting buffer' [patent_app_type] => utility [patent_app_number] => 11/646661 [patent_app_country] => US [patent_app_date] => 2006-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3187 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/541/07541852.pdf [firstpage_image] =>[orig_patent_app_number] => 11646661 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/646661
Self-correcting buffer Dec 27, 2006 Issued
Array ( [id] => 844210 [patent_doc_number] => 07388408 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-17 [patent_title] => 'Phase-frequency detector capable of reducing dead zone' [patent_app_type] => utility [patent_app_number] => 11/616031 [patent_app_country] => US [patent_app_date] => 2006-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5294 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 363 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/388/07388408.pdf [firstpage_image] =>[orig_patent_app_number] => 11616031 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/616031
Phase-frequency detector capable of reducing dead zone Dec 25, 2006 Issued
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