Search

An T. Luu

Examiner (ID: 5797, Phone: (571)272-1746 , Office: P/2842 )

Most Active Art Unit
2816
Art Unit(s)
2502, 2816, 2842
Total Applications
2105
Issued Applications
1967
Pending Applications
23
Abandoned Applications
118

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7314825 [patent_doc_number] => 20040222841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'CHARGE PUMP CIRCUIT WITHOUT BODY EFFECTS' [patent_app_type] => new [patent_app_number] => 10/604405 [patent_app_country] => US [patent_app_date] => 2003-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6771 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20040222841.pdf [firstpage_image] =>[orig_patent_app_number] => 10604405 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/604405
Charge pump circuit without body effects Jul 16, 2003 Issued
Array ( [id] => 415765 [patent_doc_number] => 07279951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-09 [patent_title] => 'DC offset cancellation circuit, differential amplification circuit with DC offset cancellation circuit, photo-electric pulse conversion circuit, pulse shaping circuit, and pulse generation circuit' [patent_app_type] => utility [patent_app_number] => 10/372967 [patent_app_country] => US [patent_app_date] => 2003-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 44 [patent_no_of_words] => 21883 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/279/07279951.pdf [firstpage_image] =>[orig_patent_app_number] => 10372967 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/372967
DC offset cancellation circuit, differential amplification circuit with DC offset cancellation circuit, photo-electric pulse conversion circuit, pulse shaping circuit, and pulse generation circuit Jul 13, 2003 Issued
Array ( [id] => 1129017 [patent_doc_number] => 06791369 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-14 [patent_title] => 'Clock presence detector comparing differential clock to common-mode voltage' [patent_app_type] => B1 [patent_app_number] => 10/604284 [patent_app_country] => US [patent_app_date] => 2003-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4017 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/791/06791369.pdf [firstpage_image] =>[orig_patent_app_number] => 10604284 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/604284
Clock presence detector comparing differential clock to common-mode voltage Jul 7, 2003 Issued
Array ( [id] => 935800 [patent_doc_number] => 06975150 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'Apparatus and methods to control laser duty cycle' [patent_app_type] => utility [patent_app_number] => 10/608331 [patent_app_country] => US [patent_app_date] => 2003-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2543 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/975/06975150.pdf [firstpage_image] =>[orig_patent_app_number] => 10608331 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/608331
Apparatus and methods to control laser duty cycle Jun 26, 2003 Issued
Array ( [id] => 935807 [patent_doc_number] => 06975157 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-13 [patent_title] => 'Starter device for normally off JFETs' [patent_app_type] => utility [patent_app_number] => 10/609253 [patent_app_country] => US [patent_app_date] => 2003-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5233 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/975/06975157.pdf [firstpage_image] =>[orig_patent_app_number] => 10609253 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/609253
Starter device for normally off JFETs Jun 25, 2003 Issued
Array ( [id] => 7358263 [patent_doc_number] => 20040004509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'Voltage conversion circuit and semiconductor integrated circuit device provided therewith' [patent_app_type] => new [patent_app_number] => 10/602708 [patent_app_country] => US [patent_app_date] => 2003-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 16074 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20040004509.pdf [firstpage_image] =>[orig_patent_app_number] => 10602708 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/602708
Voltage conversion circuit and semiconductor integrated circuit device provided therewith Jun 24, 2003 Issued
Array ( [id] => 1025859 [patent_doc_number] => 06885231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-26 [patent_title] => 'Variable delay element for use in delay tuning of integrated circuits' [patent_app_type] => utility [patent_app_number] => 10/465874 [patent_app_country] => US [patent_app_date] => 2003-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3112 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/885/06885231.pdf [firstpage_image] =>[orig_patent_app_number] => 10465874 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/465874
Variable delay element for use in delay tuning of integrated circuits Jun 19, 2003 Issued
Array ( [id] => 1167283 [patent_doc_number] => 06772406 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-03 [patent_title] => 'Method for making large-scale ASIC using pre-engineered long distance routing structure' [patent_app_type] => B1 [patent_app_number] => 10/464108 [patent_app_country] => US [patent_app_date] => 2003-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 6564 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/772/06772406.pdf [firstpage_image] =>[orig_patent_app_number] => 10464108 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/464108
Method for making large-scale ASIC using pre-engineered long distance routing structure Jun 16, 2003 Issued
Array ( [id] => 7324108 [patent_doc_number] => 20040251949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Current-mode synapse multiplier circuit' [patent_app_type] => new [patent_app_number] => 10/459529 [patent_app_country] => US [patent_app_date] => 2003-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5064 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0251/20040251949.pdf [firstpage_image] =>[orig_patent_app_number] => 10459529 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/459529
Current-mode synapse multiplier circuit Jun 11, 2003 Issued
Array ( [id] => 770692 [patent_doc_number] => 07005907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-28 [patent_title] => 'Integrated circuit device with clock skew reduced' [patent_app_type] => utility [patent_app_number] => 10/458643 [patent_app_country] => US [patent_app_date] => 2003-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4497 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/005/07005907.pdf [firstpage_image] =>[orig_patent_app_number] => 10458643 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/458643
Integrated circuit device with clock skew reduced Jun 10, 2003 Issued
Array ( [id] => 973011 [patent_doc_number] => 06937076 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Clock synchronizing apparatus and method using frequency dependent variable delay' [patent_app_type] => utility [patent_app_number] => 10/459851 [patent_app_country] => US [patent_app_date] => 2003-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 9679 [patent_no_of_claims] => 65 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/937/06937076.pdf [firstpage_image] =>[orig_patent_app_number] => 10459851 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/459851
Clock synchronizing apparatus and method using frequency dependent variable delay Jun 10, 2003 Issued
Array ( [id] => 7339736 [patent_doc_number] => 20040246037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Low skew, power efficient local clock signal generation system' [patent_app_type] => new [patent_app_number] => 10/455178 [patent_app_country] => US [patent_app_date] => 2003-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7736 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20040246037.pdf [firstpage_image] =>[orig_patent_app_number] => 10455178 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/455178
Low skew, power efficient local clock signal generation system Jun 4, 2003 Issued
Array ( [id] => 1019068 [patent_doc_number] => 06891422 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-10 [patent_title] => 'Level shifter and flat panel display' [patent_app_type] => utility [patent_app_number] => 10/445070 [patent_app_country] => US [patent_app_date] => 2003-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 4810 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/891/06891422.pdf [firstpage_image] =>[orig_patent_app_number] => 10445070 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/445070
Level shifter and flat panel display May 22, 2003 Issued
Array ( [id] => 660108 [patent_doc_number] => 07106106 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-12 [patent_title] => 'Clocked comparator circuit' [patent_app_type] => utility [patent_app_number] => 10/515688 [patent_app_country] => US [patent_app_date] => 2003-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2567 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/106/07106106.pdf [firstpage_image] =>[orig_patent_app_number] => 10515688 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/515688
Clocked comparator circuit May 20, 2003 Issued
Array ( [id] => 1133480 [patent_doc_number] => 06788112 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-07 [patent_title] => 'High performance dual-stage sense amplifier circuit' [patent_app_type] => B1 [patent_app_number] => 10/436229 [patent_app_country] => US [patent_app_date] => 2003-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6039 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/788/06788112.pdf [firstpage_image] =>[orig_patent_app_number] => 10436229 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/436229
High performance dual-stage sense amplifier circuit May 11, 2003 Issued
Array ( [id] => 1121607 [patent_doc_number] => 06798256 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-28 [patent_title] => 'Resonant buffer apparatus, method, and system' [patent_app_type] => B1 [patent_app_number] => 10/426606 [patent_app_country] => US [patent_app_date] => 2003-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5407 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/798/06798256.pdf [firstpage_image] =>[orig_patent_app_number] => 10426606 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/426606
Resonant buffer apparatus, method, and system Apr 29, 2003 Issued
Array ( [id] => 6700410 [patent_doc_number] => 20030223290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-04 [patent_title] => 'Semiconductor memory device with data bus scheme for reducing high frequency noise' [patent_app_type] => new [patent_app_number] => 10/424923 [patent_app_country] => US [patent_app_date] => 2003-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3197 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20030223290.pdf [firstpage_image] =>[orig_patent_app_number] => 10424923 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/424923
Semiconductor memory device with data bus scheme for reducing high frequency noise Apr 28, 2003 Issued
Array ( [id] => 1171297 [patent_doc_number] => 06756834 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-29 [patent_title] => 'Direct power-to-ground ESD protection with an electrostatic common-discharge line' [patent_app_type] => B1 [patent_app_number] => 10/249670 [patent_app_country] => US [patent_app_date] => 2003-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3115 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/756/06756834.pdf [firstpage_image] =>[orig_patent_app_number] => 10249670 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/249670
Direct power-to-ground ESD protection with an electrostatic common-discharge line Apr 28, 2003 Issued
Array ( [id] => 7364734 [patent_doc_number] => 20040217823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Compact broadband balun' [patent_app_type] => new [patent_app_number] => 10/425263 [patent_app_country] => US [patent_app_date] => 2003-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4382 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20040217823.pdf [firstpage_image] =>[orig_patent_app_number] => 10425263 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/425263
Compact broadband balun Apr 28, 2003 Issued
Array ( [id] => 1249295 [patent_doc_number] => 06674319 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Power down mode signaled by differential transmitter\'s high-Z state detected by receiver sensing same voltage on differential lines' [patent_app_type] => B1 [patent_app_number] => 10/249643 [patent_app_country] => US [patent_app_date] => 2003-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4821 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/674/06674319.pdf [firstpage_image] =>[orig_patent_app_number] => 10249643 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/249643
Power down mode signaled by differential transmitter's high-Z state detected by receiver sensing same voltage on differential lines Apr 27, 2003 Issued
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