
Ana J. Picon-feliciano
Examiner (ID: 3342, Phone: (571)272-5252 , Office: P/2482 )
| Most Active Art Unit | 2482 |
| Art Unit(s) | 2482 |
| Total Applications | 463 |
| Issued Applications | 290 |
| Pending Applications | 56 |
| Abandoned Applications | 137 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11946563
[patent_doc_number] => 20170250714
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-31
[patent_title] => 'ERROR CORRECTION CIRCUIT AND ERROR CORRECTION METHOD'
[patent_app_type] => utility
[patent_app_number] => 15/219409
[patent_app_country] => US
[patent_app_date] => 2016-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6372
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15219409
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/219409 | ERROR CORRECTION CIRCUIT AND ERROR CORRECTION METHOD | Jul 25, 2016 | Abandoned |
Array
(
[id] => 14123295
[patent_doc_number] => 10248506
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-04-02
[patent_title] => Storing data and associated metadata in a dispersed storage network
[patent_app_type] => utility
[patent_app_number] => 15/219741
[patent_app_country] => US
[patent_app_date] => 2016-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 6554
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 279
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15219741
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/219741 | Storing data and associated metadata in a dispersed storage network | Jul 25, 2016 | Issued |
Array
(
[id] => 11945058
[patent_doc_number] => 20170249209
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-31
[patent_title] => 'DATA STORAGE DEVICE AND OPERATING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 15/219448
[patent_app_country] => US
[patent_app_date] => 2016-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 8911
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15219448
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/219448 | Data storage device and operating method thereof | Jul 25, 2016 | Issued |
Array
(
[id] => 15058971
[patent_doc_number] => 10459790
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-10-29
[patent_title] => Elastic storage in a dispersed storage network
[patent_app_type] => utility
[patent_app_number] => 15/219469
[patent_app_country] => US
[patent_app_date] => 2016-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 7267
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15219469
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/219469 | Elastic storage in a dispersed storage network | Jul 25, 2016 | Issued |
Array
(
[id] => 11982063
[patent_doc_number] => 20170286218
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-05
[patent_title] => 'SEMICONDUCTOR DEVICES, AND SEMICONDUCTOR SYSTEMS'
[patent_app_type] => utility
[patent_app_number] => 15/219519
[patent_app_country] => US
[patent_app_date] => 2016-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8281
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15219519
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/219519 | SEMICONDUCTOR DEVICES, AND SEMICONDUCTOR SYSTEMS | Jul 25, 2016 | Abandoned |
Array
(
[id] => 14766509
[patent_doc_number] => 10394651
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-27
[patent_title] => Computing system with circular-shift recovery mechanism and method of operation thereof
[patent_app_type] => utility
[patent_app_number] => 15/204485
[patent_app_country] => US
[patent_app_date] => 2016-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 17104
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15204485
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/204485 | Computing system with circular-shift recovery mechanism and method of operation thereof | Jul 6, 2016 | Issued |
Array
(
[id] => 11853684
[patent_doc_number] => 20170228176
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-10
[patent_title] => 'DATA STORAGE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/202777
[patent_app_country] => US
[patent_app_date] => 2016-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5733
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15202777
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/202777 | Data storage device | Jul 5, 2016 | Issued |
Array
(
[id] => 12055152
[patent_doc_number] => 20170331496
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-16
[patent_title] => 'DECODING METHOD AND DECODER FOR LOW DENSITY PARITY CHECK CODE'
[patent_app_type] => utility
[patent_app_number] => 15/203440
[patent_app_country] => US
[patent_app_date] => 2016-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4834
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15203440
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/203440 | DECODING METHOD AND DECODER FOR LOW DENSITY PARITY CHECK CODE | Jul 5, 2016 | Abandoned |
Array
(
[id] => 13053859
[patent_doc_number] => 10048315
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-08-14
[patent_title] => Stuck-at fault detection on the clock tree buffers of a clock source
[patent_app_type] => utility
[patent_app_number] => 15/203362
[patent_app_country] => US
[patent_app_date] => 2016-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3485
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15203362
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/203362 | Stuck-at fault detection on the clock tree buffers of a clock source | Jul 5, 2016 | Issued |
Array
(
[id] => 13668949
[patent_doc_number] => 10164664
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-12-25
[patent_title] => Time and cell de-interleaving circuit and method for performing time and cell de-interleaving
[patent_app_type] => utility
[patent_app_number] => 15/202954
[patent_app_country] => US
[patent_app_date] => 2016-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 35
[patent_no_of_words] => 11513
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 314
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15202954
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/202954 | Time and cell de-interleaving circuit and method for performing time and cell de-interleaving | Jul 5, 2016 | Issued |
Array
(
[id] => 16324920
[patent_doc_number] => 10784901
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-22
[patent_title] => Puncturing for structured low density parity check (LDPC) codes
[patent_app_type] => utility
[patent_app_number] => 15/202207
[patent_app_country] => US
[patent_app_date] => 2016-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 17
[patent_no_of_words] => 12965
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15202207
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/202207 | Puncturing for structured low density parity check (LDPC) codes | Jul 4, 2016 | Issued |
Array
(
[id] => 14061895
[patent_doc_number] => 10235240
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-03-19
[patent_title] => System and method of reliable distributed data storage with controlled redundancy
[patent_app_type] => utility
[patent_app_number] => 15/201688
[patent_app_country] => US
[patent_app_date] => 2016-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 20
[patent_no_of_words] => 14366
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201688
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/201688 | System and method of reliable distributed data storage with controlled redundancy | Jul 4, 2016 | Issued |
Array
(
[id] => 13005663
[patent_doc_number] => 10026502
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-17
[patent_title] => Method and memory controller
[patent_app_type] => utility
[patent_app_number] => 15/201723
[patent_app_country] => US
[patent_app_date] => 2016-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 12610
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201723
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/201723 | Method and memory controller | Jul 4, 2016 | Issued |
Array
(
[id] => 11530000
[patent_doc_number] => 20170089978
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-30
[patent_title] => 'INTEGRATED CIRCUIT WITH SECURE SCAN ENABLE'
[patent_app_type] => utility
[patent_app_number] => 15/201503
[patent_app_country] => US
[patent_app_date] => 2016-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5824
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201503
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/201503 | Integrated circuit with secure scan enable | Jul 2, 2016 | Issued |
Array
(
[id] => 14431211
[patent_doc_number] => 10320425
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-06-11
[patent_title] => Staircase forward error correction coding
[patent_app_type] => utility
[patent_app_number] => 15/194432
[patent_app_country] => US
[patent_app_date] => 2016-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 5246
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15194432
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/194432 | Staircase forward error correction coding | Jun 26, 2016 | Issued |
Array
(
[id] => 11104455
[patent_doc_number] => 20160301425
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-13
[patent_title] => 'NON-CONCATENATED FEC CODES FOR ULTRA-HIGH SPEED OPTICAL TRANSPORT NETWORKS'
[patent_app_type] => utility
[patent_app_number] => 15/188957
[patent_app_country] => US
[patent_app_date] => 2016-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 11160
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15188957
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/188957 | Non-concatenated FEC codes for ultra-high speed optical transport networks | Jun 20, 2016 | Issued |
Array
(
[id] => 11103656
[patent_doc_number] => 20160300626
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-13
[patent_title] => 'SEMICONDUCTOR SYSTEM AND METHOD FOR TESTING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/183433
[patent_app_country] => US
[patent_app_date] => 2016-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 9028
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15183433
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/183433 | Semiconductor system and method for testing semiconductor device | Jun 14, 2016 | Issued |
Array
(
[id] => 14165005
[patent_doc_number] => 20190109605
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-04-11
[patent_title] => DATA PROCESSING DEVICE, DATA PROCESSING METHOD, AND COMPUTER READABLE MEDIUM
[patent_app_type] => utility
[patent_app_number] => 16/093949
[patent_app_country] => US
[patent_app_date] => 2016-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5054
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -2
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16093949
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/093949 | Data processing device, data processing method, and computer readable medium | Jun 6, 2016 | Issued |
Array
(
[id] => 12093847
[patent_doc_number] => 20170350940
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-12-07
[patent_title] => 'PARTITION-ABLE STORAGE OF TEST RESULTS USING INACTIVE STORAGE ELEMENTS'
[patent_app_type] => utility
[patent_app_number] => 15/170365
[patent_app_country] => US
[patent_app_date] => 2016-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5203
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15170365
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/170365 | Partition-able storage of test results using inactive storage elements | May 31, 2016 | Issued |
Array
(
[id] => 11990061
[patent_doc_number] => 20170294217
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-12
[patent_title] => 'DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT'
[patent_app_type] => utility
[patent_app_number] => 15/170931
[patent_app_country] => US
[patent_app_date] => 2016-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 11651
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15170931
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/170931 | DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT | May 31, 2016 | Abandoned |