
Ana J. Picon-feliciano
Examiner (ID: 3342, Phone: (571)272-5252 , Office: P/2482 )
| Most Active Art Unit | 2482 |
| Art Unit(s) | 2482 |
| Total Applications | 463 |
| Issued Applications | 290 |
| Pending Applications | 56 |
| Abandoned Applications | 137 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9933914
[patent_doc_number] => 20150082106
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-03-19
[patent_title] => 'MEMORY DEVICES, TESTING SYSTEMS AND METHODS'
[patent_app_type] => utility
[patent_app_number] => 14/518734
[patent_app_country] => US
[patent_app_date] => 2014-10-20
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/518734 | Memory devices, testing systems and methods | Oct 19, 2014 | Issued |
Array
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[id] => 10210734
[patent_doc_number] => 20150095726
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-02
[patent_title] => 'SNR margin determination based on FEC code and/or ECC decoding statistics'
[patent_app_type] => utility
[patent_app_number] => 14/499934
[patent_app_country] => US
[patent_app_date] => 2014-09-29
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/499934 | SNR margin determination based on FEC code and/or ECC decoding statistics | Sep 28, 2014 | Abandoned |
Array
(
[id] => 11264960
[patent_doc_number] => 09489257
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-08
[patent_title] => 'Correcting soft reliability measures of storage values read from memory cells'
[patent_app_type] => utility
[patent_app_number] => 14/499207
[patent_app_country] => US
[patent_app_date] => 2014-09-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/499207 | Correcting soft reliability measures of storage values read from memory cells | Sep 27, 2014 | Issued |
Array
(
[id] => 10210742
[patent_doc_number] => 20150095734
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-02
[patent_title] => 'DETECTING HIDDEN FAULT USING FAULT DETECTION CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 14/497985
[patent_app_country] => US
[patent_app_date] => 2014-09-26
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/497985 | DETECTING HIDDEN FAULT USING FAULT DETECTION CIRCUIT | Sep 25, 2014 | Abandoned |
Array
(
[id] => 10401517
[patent_doc_number] => 20150286526
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-10-08
[patent_title] => 'METHOD FOR RENEWING DATA IN ORDER TO INCREASE THE RELIABILITY OF FLASH MEMORIES'
[patent_app_type] => utility
[patent_app_number] => 14/493391
[patent_app_country] => US
[patent_app_date] => 2014-09-23
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/493391 | Method for renewing data in order to increase the reliability of flash memories | Sep 22, 2014 | Issued |
Array
(
[id] => 10258193
[patent_doc_number] => 20150143190
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-21
[patent_title] => 'PARTIAL SCAN CELL'
[patent_app_type] => utility
[patent_app_number] => 14/492784
[patent_app_country] => US
[patent_app_date] => 2014-09-22
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/492784 | Partial scan cell | Sep 21, 2014 | Issued |
Array
(
[id] => 11206237
[patent_doc_number] => 09435863
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-09-06
[patent_title] => 'Integrated circuit testing interface on automatic test equipment'
[patent_app_type] => utility
[patent_app_number] => 14/492067
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/492067 | Integrated circuit testing interface on automatic test equipment | Sep 20, 2014 | Issued |
Array
(
[id] => 11416671
[patent_doc_number] => 09563498
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-02-07
[patent_title] => 'Method for preventing read-disturb errors, memory control circuit unit and memory storage apparatus'
[patent_app_type] => utility
[patent_app_number] => 14/490684
[patent_app_country] => US
[patent_app_date] => 2014-09-19
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/490684 | Method for preventing read-disturb errors, memory control circuit unit and memory storage apparatus | Sep 18, 2014 | Issued |
Array
(
[id] => 11644912
[patent_doc_number] => 09666301
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-05-30
[patent_title] => 'Scannable memories with robust clocking methodology to prevent inadvertent reads or writes'
[patent_app_type] => utility
[patent_app_number] => 14/488171
[patent_app_country] => US
[patent_app_date] => 2014-09-16
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/488171 | Scannable memories with robust clocking methodology to prevent inadvertent reads or writes | Sep 15, 2014 | Issued |
Array
(
[id] => 10731003
[patent_doc_number] => 20160077153
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[patent_kind] => A1
[patent_issue_date] => 2016-03-17
[patent_title] => 'MEMORY UTILIZING BUNDLE-LEVEL STATUS VALUES AND BUNDLE STATUS CIRCUITS'
[patent_app_type] => utility
[patent_app_number] => 14/486963
[patent_app_country] => US
[patent_app_date] => 2014-09-15
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/486963 | Memory utilizing bundle-level status values and bundle status circuits | Sep 14, 2014 | Issued |
Array
(
[id] => 10732815
[patent_doc_number] => 20160078966
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-17
[patent_title] => 'METHOD OF PERFORMING WEAR MANAGEMENT IN NON-VOLATILE MEMORY DEVICES'
[patent_app_type] => utility
[patent_app_number] => 14/485779
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/485779 | METHOD OF PERFORMING WEAR MANAGEMENT IN NON-VOLATILE MEMORY DEVICES | Sep 13, 2014 | Abandoned |
Array
(
[id] => 10210741
[patent_doc_number] => 20150095733
[patent_country] => US
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[patent_issue_date] => 2015-04-02
[patent_title] => 'Method and Apparatus for Testing Surface Mounted Devices'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/478824 | Method and apparatus for testing surface mounted devices | Sep 4, 2014 | Issued |
Array
(
[id] => 10715747
[patent_doc_number] => 20160061894
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-03
[patent_title] => 'SCHEME TO MEASURE INDIVIDUALLY RISE AND FALL DELAYS OF NON-INVERTING LOGIC CELLS'
[patent_app_type] => utility
[patent_app_number] => 14/472220
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/472220 | Scheme to measure individually rise and fall delays of non-inverting logic cells | Aug 27, 2014 | Issued |
Array
(
[id] => 10994133
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[patent_issue_date] => 2016-06-30
[patent_title] => 'COMMUNICATION PATH DECODING METHOD AND COMMUNICATION DECODING DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/912054 | Channel decoding method and channel decoding device | Aug 7, 2014 | Issued |
Array
(
[id] => 10371197
[patent_doc_number] => 20150256204
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[patent_kind] => A1
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[patent_title] => 'MEMORY CONTROLLER, STORAGE DEVICE AND MEMORY CONTROL METHOD'
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Array
(
[id] => 11201829
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[patent_issue_date] => 2016-08-30
[patent_title] => 'Method for decoding a correcting code with message passing, in particular for decoding LDPC codes or turbo codes'
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Array
(
[id] => 11200114
[patent_doc_number] => 09430326
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[patent_issue_date] => 2016-08-30
[patent_title] => 'Multiple ECC codeword sizes in an SSD'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/338264 | Multiple ECC codeword sizes in an SSD | Jul 21, 2014 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/326731 | Methods for accessing a storage unit of a flash memory and apparatuses using the same | Jul 8, 2014 | Issued |
Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/314977 | High reliability erasure code distribution | Jun 24, 2014 | Issued |