Search

Ana J. Picon-feliciano

Examiner (ID: 3342, Phone: (571)272-5252 , Office: P/2482 )

Most Active Art Unit
2482
Art Unit(s)
2482
Total Applications
463
Issued Applications
290
Pending Applications
56
Abandoned Applications
137

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9933914 [patent_doc_number] => 20150082106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'MEMORY DEVICES, TESTING SYSTEMS AND METHODS' [patent_app_type] => utility [patent_app_number] => 14/518734 [patent_app_country] => US [patent_app_date] => 2014-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4814 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14518734 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/518734
Memory devices, testing systems and methods Oct 19, 2014 Issued
Array ( [id] => 10210734 [patent_doc_number] => 20150095726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'SNR margin determination based on FEC code and/or ECC decoding statistics' [patent_app_type] => utility [patent_app_number] => 14/499934 [patent_app_country] => US [patent_app_date] => 2014-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 13508 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14499934 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/499934
SNR margin determination based on FEC code and/or ECC decoding statistics Sep 28, 2014 Abandoned
Array ( [id] => 11264960 [patent_doc_number] => 09489257 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-08 [patent_title] => 'Correcting soft reliability measures of storage values read from memory cells' [patent_app_type] => utility [patent_app_number] => 14/499207 [patent_app_country] => US [patent_app_date] => 2014-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 10266 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14499207 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/499207
Correcting soft reliability measures of storage values read from memory cells Sep 27, 2014 Issued
Array ( [id] => 10210742 [patent_doc_number] => 20150095734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'DETECTING HIDDEN FAULT USING FAULT DETECTION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/497985 [patent_app_country] => US [patent_app_date] => 2014-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4937 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14497985 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/497985
DETECTING HIDDEN FAULT USING FAULT DETECTION CIRCUIT Sep 25, 2014 Abandoned
Array ( [id] => 10401517 [patent_doc_number] => 20150286526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'METHOD FOR RENEWING DATA IN ORDER TO INCREASE THE RELIABILITY OF FLASH MEMORIES' [patent_app_type] => utility [patent_app_number] => 14/493391 [patent_app_country] => US [patent_app_date] => 2014-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2993 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14493391 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/493391
Method for renewing data in order to increase the reliability of flash memories Sep 22, 2014 Issued
Array ( [id] => 10258193 [patent_doc_number] => 20150143190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-21 [patent_title] => 'PARTIAL SCAN CELL' [patent_app_type] => utility [patent_app_number] => 14/492784 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3299 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14492784 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/492784
Partial scan cell Sep 21, 2014 Issued
Array ( [id] => 11206237 [patent_doc_number] => 09435863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-06 [patent_title] => 'Integrated circuit testing interface on automatic test equipment' [patent_app_type] => utility [patent_app_number] => 14/492067 [patent_app_country] => US [patent_app_date] => 2014-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4853 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14492067 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/492067
Integrated circuit testing interface on automatic test equipment Sep 20, 2014 Issued
Array ( [id] => 11416671 [patent_doc_number] => 09563498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-07 [patent_title] => 'Method for preventing read-disturb errors, memory control circuit unit and memory storage apparatus' [patent_app_type] => utility [patent_app_number] => 14/490684 [patent_app_country] => US [patent_app_date] => 2014-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 10708 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14490684 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/490684
Method for preventing read-disturb errors, memory control circuit unit and memory storage apparatus Sep 18, 2014 Issued
Array ( [id] => 11644912 [patent_doc_number] => 09666301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Scannable memories with robust clocking methodology to prevent inadvertent reads or writes' [patent_app_type] => utility [patent_app_number] => 14/488171 [patent_app_country] => US [patent_app_date] => 2014-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4672 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14488171 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/488171
Scannable memories with robust clocking methodology to prevent inadvertent reads or writes Sep 15, 2014 Issued
Array ( [id] => 10731003 [patent_doc_number] => 20160077153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'MEMORY UTILIZING BUNDLE-LEVEL STATUS VALUES AND BUNDLE STATUS CIRCUITS' [patent_app_type] => utility [patent_app_number] => 14/486963 [patent_app_country] => US [patent_app_date] => 2014-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13298 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14486963 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/486963
Memory utilizing bundle-level status values and bundle status circuits Sep 14, 2014 Issued
Array ( [id] => 10732815 [patent_doc_number] => 20160078966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'METHOD OF PERFORMING WEAR MANAGEMENT IN NON-VOLATILE MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 14/485779 [patent_app_country] => US [patent_app_date] => 2014-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4594 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14485779 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/485779
METHOD OF PERFORMING WEAR MANAGEMENT IN NON-VOLATILE MEMORY DEVICES Sep 13, 2014 Abandoned
Array ( [id] => 10210741 [patent_doc_number] => 20150095733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'Method and Apparatus for Testing Surface Mounted Devices' [patent_app_type] => utility [patent_app_number] => 14/478824 [patent_app_country] => US [patent_app_date] => 2014-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7146 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14478824 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/478824
Method and apparatus for testing surface mounted devices Sep 4, 2014 Issued
Array ( [id] => 10715747 [patent_doc_number] => 20160061894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-03 [patent_title] => 'SCHEME TO MEASURE INDIVIDUALLY RISE AND FALL DELAYS OF NON-INVERTING LOGIC CELLS' [patent_app_type] => utility [patent_app_number] => 14/472220 [patent_app_country] => US [patent_app_date] => 2014-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7747 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14472220 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/472220
Scheme to measure individually rise and fall delays of non-inverting logic cells Aug 27, 2014 Issued
Array ( [id] => 10994133 [patent_doc_number] => 20160191080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'COMMUNICATION PATH DECODING METHOD AND COMMUNICATION DECODING DEVICE' [patent_app_type] => utility [patent_app_number] => 14/912054 [patent_app_country] => US [patent_app_date] => 2014-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7376 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14912054 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/912054
Channel decoding method and channel decoding device Aug 7, 2014 Issued
Array ( [id] => 10371197 [patent_doc_number] => 20150256204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'MEMORY CONTROLLER, STORAGE DEVICE AND MEMORY CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 14/452679 [patent_app_country] => US [patent_app_date] => 2014-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7503 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14452679 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/452679
MEMORY CONTROLLER, STORAGE DEVICE AND MEMORY CONTROL METHOD Aug 5, 2014 Abandoned
Array ( [id] => 11201829 [patent_doc_number] => 09432054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-30 [patent_title] => 'Method for decoding a correcting code with message passing, in particular for decoding LDPC codes or turbo codes' [patent_app_type] => utility [patent_app_number] => 14/444027 [patent_app_country] => US [patent_app_date] => 2014-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5788 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14444027 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/444027
Method for decoding a correcting code with message passing, in particular for decoding LDPC codes or turbo codes Jul 27, 2014 Issued
Array ( [id] => 11200114 [patent_doc_number] => 09430326 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-30 [patent_title] => 'Multiple ECC codeword sizes in an SSD' [patent_app_type] => utility [patent_app_number] => 14/338264 [patent_app_country] => US [patent_app_date] => 2014-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6179 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14338264 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/338264
Multiple ECC codeword sizes in an SSD Jul 21, 2014 Issued
Array ( [id] => 10258191 [patent_doc_number] => 20150143188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-21 [patent_title] => 'METHODS FOR ACCESSING A STORAGE UNIT OF A FLASH MEMORY AND APPARATUSES USING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/326731 [patent_app_country] => US [patent_app_date] => 2014-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4216 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14326731 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/326731
Methods for accessing a storage unit of a flash memory and apparatuses using the same Jul 8, 2014 Issued
Array ( [id] => 9912219 [patent_doc_number] => 20150067421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'DISPERSED STORAGE WITH VARIABLE SLICE LENGTH AND METHODS FOR USE THEREWITH' [patent_app_type] => utility [patent_app_number] => 14/315981 [patent_app_country] => US [patent_app_date] => 2014-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 55 [patent_no_of_words] => 38335 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14315981 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/315981
Dispersed storage with variable slice length and methods for use therewith Jun 25, 2014 Issued
Array ( [id] => 10493798 [patent_doc_number] => 20150378820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'High Reliability Erasure Code Distribution' [patent_app_type] => utility [patent_app_number] => 14/314977 [patent_app_country] => US [patent_app_date] => 2014-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5867 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14314977 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/314977
High reliability erasure code distribution Jun 24, 2014 Issued
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