Search

Ana J. Picon-feliciano

Examiner (ID: 3342, Phone: (571)272-5252 , Office: P/2482 )

Most Active Art Unit
2482
Art Unit(s)
2482
Total Applications
463
Issued Applications
290
Pending Applications
56
Abandoned Applications
137

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10124249 [patent_doc_number] => 09158607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-13 [patent_title] => 'Apparatuses and methods for operating a memory device' [patent_app_type] => utility [patent_app_number] => 14/171051 [patent_app_country] => US [patent_app_date] => 2014-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5861 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14171051 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/171051
Apparatuses and methods for operating a memory device Feb 2, 2014 Issued
Array ( [id] => 10556215 [patent_doc_number] => 09280416 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-08 [patent_title] => 'Selection of erasure code parameters for no data repair' [patent_app_type] => utility [patent_app_number] => 14/168478 [patent_app_country] => US [patent_app_date] => 2014-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5166 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14168478 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/168478
Selection of erasure code parameters for no data repair Jan 29, 2014 Issued
Array ( [id] => 10550262 [patent_doc_number] => 09274887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-01 [patent_title] => 'Non-regular parity distribution detection via metadata tag' [patent_app_type] => utility [patent_app_number] => 14/166174 [patent_app_country] => US [patent_app_date] => 2014-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11640 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14166174 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/166174
Non-regular parity distribution detection via metadata tag Jan 27, 2014 Issued
Array ( [id] => 10327874 [patent_doc_number] => 20150212877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'APPARATUS AND METHOD FOR IMPROVING DATA STORAGE BY DATA INVERSION' [patent_app_type] => utility [patent_app_number] => 14/166360 [patent_app_country] => US [patent_app_date] => 2014-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 26572 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14166360 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/166360
Apparatus and method for improving data storage by data inversion Jan 27, 2014 Issued
Array ( [id] => 11776772 [patent_doc_number] => 09385758 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Systems and methods for efficient targeted symbol flipping' [patent_app_type] => utility [patent_app_number] => 14/159523 [patent_app_country] => US [patent_app_date] => 2014-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 9743 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14159523 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/159523
Systems and methods for efficient targeted symbol flipping Jan 20, 2014 Issued
Array ( [id] => 10228360 [patent_doc_number] => 20150113353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-23 [patent_title] => 'DECODING METHOD, DECODING CIRCUIT, MEMORY STORAGE DEVICE AND CONTROLLING CIRCUIT UNIT' [patent_app_type] => utility [patent_app_number] => 14/145989 [patent_app_country] => US [patent_app_date] => 2014-01-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10060 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14145989 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/145989
Decoding method, decoding circuit, memory storage device and controlling circuit unit Dec 31, 2013 Issued
Array ( [id] => 10034421 [patent_doc_number] => 09075739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-07 [patent_title] => 'Storage device' [patent_app_type] => utility [patent_app_number] => 14/141246 [patent_app_country] => US [patent_app_date] => 2013-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 45 [patent_no_of_words] => 22264 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14141246 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/141246
Storage device Dec 25, 2013 Issued
Array ( [id] => 11765866 [patent_doc_number] => 09374343 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-21 [patent_title] => 'Bitwise operations and apparatus in a multi-level system' [patent_app_type] => utility [patent_app_number] => 14/096436 [patent_app_country] => US [patent_app_date] => 2013-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 20007 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14096436 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/096436
Bitwise operations and apparatus in a multi-level system Dec 3, 2013 Issued
Array ( [id] => 9673454 [patent_doc_number] => 20140237318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-21 [patent_title] => 'BANDWIDTH OPTIMIZATION IN A NON-VOLATILE MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/076148 [patent_app_country] => US [patent_app_date] => 2013-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6077 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14076148 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/076148
Bandwidth optimization in a non-volatile memory system Nov 7, 2013 Issued
Array ( [id] => 9673452 [patent_doc_number] => 20140237315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-21 [patent_title] => 'METHOD AND SYSTEM FOR IMPROVING DATA INTEGRITY IN NON-VOLATILE STORAGE' [patent_app_type] => utility [patent_app_number] => 14/076115 [patent_app_country] => US [patent_app_date] => 2013-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8713 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14076115 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/076115
Method and system for improving data integrity in non-volatile storage Nov 7, 2013 Issued
Array ( [id] => 10991453 [patent_doc_number] => 20160188399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'VALIDATE WRITTEN DATA' [patent_app_type] => utility [patent_app_number] => 14/912331 [patent_app_country] => US [patent_app_date] => 2013-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4011 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14912331 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/912331
Validate written data Sep 22, 2013 Issued
Array ( [id] => 9225058 [patent_doc_number] => 20140019833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'MEMORY SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 14/031620 [patent_app_country] => US [patent_app_date] => 2013-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7316 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14031620 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/031620
MEMORY SYSTEM AND METHOD Sep 18, 2013 Abandoned
Array ( [id] => 9200500 [patent_doc_number] => 20130339815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'Power-Optimized Decoding of Linear Codes' [patent_app_type] => utility [patent_app_number] => 13/965508 [patent_app_country] => US [patent_app_date] => 2013-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5698 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13965508 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/965508
Power-optimized decoding of linear codes Aug 12, 2013 Issued
Array ( [id] => 10292323 [patent_doc_number] => 20150177322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'DEVICE FOR AND METHOD OF ESTIMATING ERROR POINT IN LOGIC DIAGRAM' [patent_app_type] => utility [patent_app_number] => 14/414991 [patent_app_country] => US [patent_app_date] => 2013-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 14755 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14414991 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/414991
Device for and method of estimating error point in logic diagram Jul 11, 2013 Issued
Array ( [id] => 10195101 [patent_doc_number] => 09224012 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-29 [patent_title] => 'Debug functionality in a secure computing environment' [patent_app_type] => utility [patent_app_number] => 13/897688 [patent_app_country] => US [patent_app_date] => 2013-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4862 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13897688 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/897688
Debug functionality in a secure computing environment May 19, 2013 Issued
Array ( [id] => 9283026 [patent_doc_number] => 20140032994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-30 [patent_title] => 'TRANSMISSION APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/893716 [patent_app_country] => US [patent_app_date] => 2013-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6446 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13893716 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/893716
TRANSMISSION APPARATUS May 13, 2013 Abandoned
Array ( [id] => 10536640 [patent_doc_number] => 09262270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Live error recovery' [patent_app_type] => utility [patent_app_number] => 13/892894 [patent_app_country] => US [patent_app_date] => 2013-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 13375 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13892894 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/892894
Live error recovery May 12, 2013 Issued
Array ( [id] => 10741608 [patent_doc_number] => 20160087759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'TUPLE RECOVERY' [patent_app_type] => utility [patent_app_number] => 14/787889 [patent_app_country] => US [patent_app_date] => 2013-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4554 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14787889 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/787889
TUPLE RECOVERY May 9, 2013 Abandoned
Array ( [id] => 10934648 [patent_doc_number] => 20140337669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-13 [patent_title] => 'On-Line Memory Testing Systems And Methods' [patent_app_type] => utility [patent_app_number] => 13/892019 [patent_app_country] => US [patent_app_date] => 2013-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5631 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13892019 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/892019
On-line memory testing systems and methods May 9, 2013 Issued
Array ( [id] => 10519574 [patent_doc_number] => 09246634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-26 [patent_title] => 'Apparatus and method for improved modulation and coding schemes for broadband satellite communications systems' [patent_app_type] => utility [patent_app_number] => 13/890643 [patent_app_country] => US [patent_app_date] => 2013-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9694 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 447 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13890643 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/890643
Apparatus and method for improved modulation and coding schemes for broadband satellite communications systems May 8, 2013 Issued
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