
Ana J. Picon-feliciano
Examiner (ID: 3342, Phone: (571)272-5252 , Office: P/2482 )
| Most Active Art Unit | 2482 |
| Art Unit(s) | 2482 |
| Total Applications | 463 |
| Issued Applications | 290 |
| Pending Applications | 56 |
| Abandoned Applications | 137 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20176507
[patent_doc_number] => 12395267
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-19
[patent_title] => Cyclic redundancy check system and cyclic redundancy check method
[patent_app_type] => utility
[patent_app_number] => 18/594878
[patent_app_country] => US
[patent_app_date] => 2024-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 4378
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18594878
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/594878 | Cyclic redundancy check system and cyclic redundancy check method | Mar 3, 2024 | Issued |
Array
(
[id] => 20455754
[patent_doc_number] => 12518814
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-06
[patent_title] => Semiconductor memory device and memory system including the same
[patent_app_type] => utility
[patent_app_number] => 18/593937
[patent_app_country] => US
[patent_app_date] => 2024-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 32
[patent_no_of_words] => 8875
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 235
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18593937
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/593937 | Semiconductor memory device and memory system including the same | Mar 2, 2024 | Issued |
Array
(
[id] => 19985701
[patent_doc_number] => 20250123923
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-17
[patent_title] => ELECTRONIC SYSTEM FOR MONITORING ERROR OF ADDRESS
[patent_app_type] => utility
[patent_app_number] => 18/587385
[patent_app_country] => US
[patent_app_date] => 2024-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5761
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18587385
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/587385 | Electronic system for monitoring error of address | Feb 25, 2024 | Issued |
Array
(
[id] => 19992668
[patent_doc_number] => 20250130890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-24
[patent_title] => MEMORY INCLUDING ECC ENGINE AND OPERATION METHOD OF MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/441755
[patent_app_country] => US
[patent_app_date] => 2024-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18441755
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/441755 | MEMORY INCLUDING ECC ENGINE AND OPERATION METHOD OF MEMORY | Feb 13, 2024 | Pending |
Array
(
[id] => 19992668
[patent_doc_number] => 20250130890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-24
[patent_title] => MEMORY INCLUDING ECC ENGINE AND OPERATION METHOD OF MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/441755
[patent_app_country] => US
[patent_app_date] => 2024-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18441755
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/441755 | MEMORY INCLUDING ECC ENGINE AND OPERATION METHOD OF MEMORY | Feb 13, 2024 | Pending |
Array
(
[id] => 19222429
[patent_doc_number] => 20240187133
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-06
[patent_title] => DECODER SUCCESS PREDICTOR SIGNALING FOR ADJUSTING MIRS SCHEDULING POLICY
[patent_app_type] => utility
[patent_app_number] => 18/442001
[patent_app_country] => US
[patent_app_date] => 2024-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17443
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18442001
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/442001 | Decoder success predictor signaling for adjusting MIRS scheduling policy | Feb 13, 2024 | Issued |
Array
(
[id] => 20123282
[patent_doc_number] => 20250238313
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-24
[patent_title] => HashTag Codes for Reduced Repair Bandwidth
[patent_app_type] => utility
[patent_app_number] => 18/417961
[patent_app_country] => US
[patent_app_date] => 2024-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6563
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18417961
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/417961 | HashTag codes for reduced repair bandwidth | Jan 18, 2024 | Issued |
Array
(
[id] => 19949489
[patent_doc_number] => 12320849
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-03
[patent_title] => Clock control circuit and method
[patent_app_type] => utility
[patent_app_number] => 18/415672
[patent_app_country] => US
[patent_app_date] => 2024-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 1209
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18415672
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/415672 | Clock control circuit and method | Jan 17, 2024 | Issued |
Array
(
[id] => 19176945
[patent_doc_number] => 20240162919
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-16
[patent_title] => TRANSMITTER, RECEIVER, TRANSMISSION METHOD, AND RECEPTION METHOD
[patent_app_type] => utility
[patent_app_number] => 18/414909
[patent_app_country] => US
[patent_app_date] => 2024-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 76287
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -1
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414909
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/414909 | TRANSMITTER, RECEIVER, TRANSMISSION METHOD, AND RECEPTION METHOD | Jan 16, 2024 | Issued |
Array
(
[id] => 19176945
[patent_doc_number] => 20240162919
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-16
[patent_title] => TRANSMITTER, RECEIVER, TRANSMISSION METHOD, AND RECEPTION METHOD
[patent_app_type] => utility
[patent_app_number] => 18/414909
[patent_app_country] => US
[patent_app_date] => 2024-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 76287
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -1
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414909
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/414909 | TRANSMITTER, RECEIVER, TRANSMISSION METHOD, AND RECEPTION METHOD | Jan 16, 2024 | Issued |
Array
(
[id] => 19176945
[patent_doc_number] => 20240162919
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-16
[patent_title] => TRANSMITTER, RECEIVER, TRANSMISSION METHOD, AND RECEPTION METHOD
[patent_app_type] => utility
[patent_app_number] => 18/414909
[patent_app_country] => US
[patent_app_date] => 2024-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 76287
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -1
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414909
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/414909 | TRANSMITTER, RECEIVER, TRANSMISSION METHOD, AND RECEPTION METHOD | Jan 16, 2024 | Issued |
Array
(
[id] => 19176945
[patent_doc_number] => 20240162919
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-16
[patent_title] => TRANSMITTER, RECEIVER, TRANSMISSION METHOD, AND RECEPTION METHOD
[patent_app_type] => utility
[patent_app_number] => 18/414909
[patent_app_country] => US
[patent_app_date] => 2024-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 76287
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -1
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414909
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/414909 | TRANSMITTER, RECEIVER, TRANSMISSION METHOD, AND RECEPTION METHOD | Jan 16, 2024 | Issued |
Array
(
[id] => 19177035
[patent_doc_number] => 20240163009
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-16
[patent_title] => COMMUNICATION METHOD AND COMMUNICATION DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/413573
[patent_app_country] => US
[patent_app_date] => 2024-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12641
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413573
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/413573 | COMMUNICATION METHOD AND COMMUNICATION DEVICE | Jan 15, 2024 | Issued |
Array
(
[id] => 20267557
[patent_doc_number] => 12438559
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-10-07
[patent_title] => Quantum computing decoder and associated methods
[patent_app_type] => utility
[patent_app_number] => 18/410972
[patent_app_country] => US
[patent_app_date] => 2024-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 4515
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18410972
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/410972 | Quantum computing decoder and associated methods | Jan 10, 2024 | Issued |
Array
(
[id] => 20045693
[patent_doc_number] => 20250183915
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-05
[patent_title] => DNA STORAGE ERROR CORRECTION CODE ARCHITECTURE FOR OPTIMIZED DECODING
[patent_app_type] => utility
[patent_app_number] => 18/528771
[patent_app_country] => US
[patent_app_date] => 2023-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3464
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18528771
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/528771 | DNA storage error correction code architecture for optimized decoding | Dec 3, 2023 | Issued |
Array
(
[id] => 20045815
[patent_doc_number] => 20250184037
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-05
[patent_title] => DECODING SCHEME FOR SUBCARRIER-GROUPED OFDM SYSTEMS UTILIZING PER-SUBCARRIER SNR VALUES
[patent_app_type] => utility
[patent_app_number] => 18/524257
[patent_app_country] => US
[patent_app_date] => 2023-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 710
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524257
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/524257 | DECODING SCHEME FOR SUBCARRIER-GROUPED OFDM SYSTEMS UTILIZING PER-SUBCARRIER SNR VALUES | Nov 29, 2023 | Abandoned |
Array
(
[id] => 20130972
[patent_doc_number] => 12373285
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-29
[patent_title] => Memory device, a controller for controlling the same, a memory system including the same, and an operating method of the same
[patent_app_type] => utility
[patent_app_number] => 18/513730
[patent_app_country] => US
[patent_app_date] => 2023-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 27
[patent_no_of_words] => 6851
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18513730
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/513730 | Memory device, a controller for controlling the same, a memory system including the same, and an operating method of the same | Nov 19, 2023 | Issued |
Array
(
[id] => 20130972
[patent_doc_number] => 12373285
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-29
[patent_title] => Memory device, a controller for controlling the same, a memory system including the same, and an operating method of the same
[patent_app_type] => utility
[patent_app_number] => 18/513730
[patent_app_country] => US
[patent_app_date] => 2023-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 27
[patent_no_of_words] => 6851
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18513730
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/513730 | Memory device, a controller for controlling the same, a memory system including the same, and an operating method of the same | Nov 19, 2023 | Issued |
Array
(
[id] => 19039216
[patent_doc_number] => 20240089031
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => CHANNEL PUNCTURING BASED ON CHANNEL QUALITIES
[patent_app_type] => utility
[patent_app_number] => 18/511879
[patent_app_country] => US
[patent_app_date] => 2023-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6685
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18511879
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/511879 | CHANNEL PUNCTURING BASED ON CHANNEL QUALITIES | Nov 15, 2023 | Abandoned |
Array
(
[id] => 19620241
[patent_doc_number] => 20240405921
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-05
[patent_title] => Systems and Methods of Inserting Idles Within Packets to Reduce Latency
[patent_app_type] => utility
[patent_app_number] => 18/511952
[patent_app_country] => US
[patent_app_date] => 2023-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12826
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18511952
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/511952 | Systems and methods of inserting idles within packets to reduce latency | Nov 15, 2023 | Issued |