Search

Andre C. Stevenson

Examiner (ID: 7041, Phone: (571)272-1683 , Office: P/2816 )

Most Active Art Unit
2812
Art Unit(s)
2817, 2816, 2812, 2899
Total Applications
1766
Issued Applications
1549
Pending Applications
118
Abandoned Applications
127

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17941654 [patent_doc_number] => 11476113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium [patent_app_type] => utility [patent_app_number] => 17/021738 [patent_app_country] => US [patent_app_date] => 2020-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 10248 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17021738 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/021738
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium Sep 14, 2020 Issued
Array ( [id] => 18016322 [patent_doc_number] => 11508628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Method for forming a crystalline protective polysilicon layer [patent_app_type] => utility [patent_app_number] => 17/021727 [patent_app_country] => US [patent_app_date] => 2020-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5143 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17021727 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/021727
Method for forming a crystalline protective polysilicon layer Sep 14, 2020 Issued
Array ( [id] => 17310344 [patent_doc_number] => 11211471 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-28 [patent_title] => Method of manufacturing a semiconductor device [patent_app_type] => utility [patent_app_number] => 17/017666 [patent_app_country] => US [patent_app_date] => 2020-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2555 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17017666 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/017666
Method of manufacturing a semiconductor device Sep 9, 2020 Issued
Array ( [id] => 17463639 [patent_doc_number] => 20220076945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => AMORPHOUS CARBON FOR GAP FILL [patent_app_type] => utility [patent_app_number] => 17/014039 [patent_app_country] => US [patent_app_date] => 2020-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17014039 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/014039
Amorphous carbon for gap fill Sep 7, 2020 Issued
Array ( [id] => 18062001 [patent_doc_number] => 20220393088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => LIGHT EMITTING DIODE DISPLAY DEVICE AND METHOD OF FABRICATING LIGHT EMITTING DIODE DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/778274 [patent_app_country] => US [patent_app_date] => 2020-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17778274 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/778274
Light emitting diode display device and method of fabricating light emitting diode display device Sep 1, 2020 Issued
Array ( [id] => 16692350 [patent_doc_number] => 20210074829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/009063 [patent_app_country] => US [patent_app_date] => 2020-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6914 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17009063 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/009063
Semiconductor structure and fabrication method thereof Aug 31, 2020 Issued
Array ( [id] => 16509379 [patent_doc_number] => 20200388635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => STAIRCASE AND CONTACT STRUCTURES FOR THREE-DIMENSIONAL MEMORY [patent_app_type] => utility [patent_app_number] => 17/002076 [patent_app_country] => US [patent_app_date] => 2020-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12947 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17002076 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/002076
Staircase and contact structures for three-dimensional memory Aug 24, 2020 Issued
Array ( [id] => 17395844 [patent_doc_number] => 11244868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-08 [patent_title] => Method for manufacturing microelectronic components [patent_app_type] => utility [patent_app_number] => 16/999642 [patent_app_country] => US [patent_app_date] => 2020-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 6462 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 349 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16999642 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/999642
Method for manufacturing microelectronic components Aug 20, 2020 Issued
Array ( [id] => 16487972 [patent_doc_number] => 20200381581 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => GROUP III NITRIDE BASED LED STRUCTURES INCLUDING MULTIPLE QUANTUM WELLS WITH BARRIER-WELL UNIT INTERFACE LAYERS [patent_app_type] => utility [patent_app_number] => 16/998651 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18192 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998651 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/998651
Group III nitride based LED structures including multiple quantum wells with barrier-well unit interface layers Aug 19, 2020 Issued
Array ( [id] => 17871060 [patent_doc_number] => 20220293797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => THIN-FILM COMPONENTS FOR INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 17/636113 [patent_app_country] => US [patent_app_date] => 2020-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6373 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17636113 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/636113
Thin-film components for integrated circuits Aug 18, 2020 Issued
Array ( [id] => 17941649 [patent_doc_number] => 11476108 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Spin on carbon composition and method of manufacturing a semiconductor device [patent_app_type] => utility [patent_app_number] => 16/984070 [patent_app_country] => US [patent_app_date] => 2020-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 9658 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16984070 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/984070
Spin on carbon composition and method of manufacturing a semiconductor device Aug 2, 2020 Issued
Array ( [id] => 16936825 [patent_doc_number] => 20210202714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/945557 [patent_app_country] => US [patent_app_date] => 2020-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8926 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16945557 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/945557
Method of manufacturing a semiconductor device and a semiconductor device Jul 30, 2020 Issued
Array ( [id] => 17607070 [patent_doc_number] => 11335562 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Self-aligned contact and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/939235 [patent_app_country] => US [patent_app_date] => 2020-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 34 [patent_no_of_words] => 8900 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16939235 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/939235
Self-aligned contact and manufacturing method thereof Jul 26, 2020 Issued
Array ( [id] => 17410379 [patent_doc_number] => 11251279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-15 [patent_title] => High voltage transistor structure and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 16/936442 [patent_app_country] => US [patent_app_date] => 2020-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2551 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16936442 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/936442
High voltage transistor structure and method of fabricating the same Jul 22, 2020 Issued
Array ( [id] => 18120525 [patent_doc_number] => 11551924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Semiconductor structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/935561 [patent_app_country] => US [patent_app_date] => 2020-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 6089 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16935561 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/935561
Semiconductor structure and method for forming the same Jul 21, 2020 Issued
Array ( [id] => 16617201 [patent_doc_number] => 20210035854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => METHOD OF FORMING A STRUCTURE USING FLUORINE REMOVAL [patent_app_type] => utility [patent_app_number] => 16/932707 [patent_app_country] => US [patent_app_date] => 2020-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5465 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16932707 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/932707
METHOD OF FORMING A STRUCTURE USING FLUORINE REMOVAL Jul 17, 2020 Abandoned
Array ( [id] => 17493430 [patent_doc_number] => 11282743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-22 [patent_title] => Semiconductor device with multi-layer connecting structure and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/932376 [patent_app_country] => US [patent_app_date] => 2020-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8248 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16932376 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/932376
Semiconductor device with multi-layer connecting structure and method for fabricating the same Jul 16, 2020 Issued
Array ( [id] => 16402409 [patent_doc_number] => 20200343267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => METHOD FOR HIGH PERFORMANCE STANDARD CELL DESIGN TECHNIQUES IN FINFET BASED LIBRARY USING LOCAL LAYOUT EFFECTS (LLE) [patent_app_type] => utility [patent_app_number] => 16/924377 [patent_app_country] => US [patent_app_date] => 2020-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5098 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16924377 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/924377
Method for high performance standard cell design techniques in FinFET based library using local layout effects (LLE) Jul 8, 2020 Issued
Array ( [id] => 19611026 [patent_doc_number] => 12159908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Semiconductor device and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 16/975390 [patent_app_country] => US [patent_app_date] => 2020-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8255 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16975390 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/975390
Semiconductor device and fabrication method thereof Jul 6, 2020 Issued
Array ( [id] => 17270296 [patent_doc_number] => 11195724 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-07 [patent_title] => Method of manufacturing semiconductor structure [patent_app_type] => utility [patent_app_number] => 16/919077 [patent_app_country] => US [patent_app_date] => 2020-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2295 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16919077 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/919077
Method of manufacturing semiconductor structure Jun 30, 2020 Issued
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