Search

Andre C. Stevenson

Examiner (ID: 17977, Phone: (571)272-1683 , Office: P/2816 )

Most Active Art Unit
2812
Art Unit(s)
2816, 2899, 2817, 2812
Total Applications
1740
Issued Applications
1530
Pending Applications
127
Abandoned Applications
125

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19054927 [patent_doc_number] => 20240096896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => NON-PLANAR INTEGRATED CIRCUIT STRUCTURES HAVING MITIGATED SOURCE OR DRAIN ETCH FROM REPLACEMENT GATE PROCESS [patent_app_type] => utility [patent_app_number] => 18/523637 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15820 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18523637 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/523637
Non-planar integrated circuit structures having mitigated source or drain etch from replacement gate process Nov 28, 2023 Issued
Array ( [id] => 19793216 [patent_doc_number] => 12234145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Methods for wafer bonding [patent_app_type] => utility [patent_app_number] => 18/513545 [patent_app_country] => US [patent_app_date] => 2023-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5435 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18513545 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/513545
Methods for wafer bonding Nov 17, 2023 Issued
Array ( [id] => 19023301 [patent_doc_number] => 20240079472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/502110 [patent_app_country] => US [patent_app_date] => 2023-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9297 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18502110 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/502110
Semiconductor device and manufacturing method for the semiconductor device Nov 5, 2023 Issued
Array ( [id] => 18977243 [patent_doc_number] => 20240057335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => INTEGRATED ASSEMBLIES AND METHODS OF FORMING INTEGRATED ASSEMBLIES [patent_app_type] => utility [patent_app_number] => 18/384455 [patent_app_country] => US [patent_app_date] => 2023-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18384455 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/384455
Integrated assemblies and methods of forming integrated assemblies Oct 26, 2023 Issued
Array ( [id] => 18991117 [patent_doc_number] => 20240063086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => Monatomic Single-Entity Baseplate Structure Employing a Thermoplastic Polyimide Bondline Between a Silicon Substrate and a Metallic Heat Sink Having Mismatched Coefficients of Thermal [patent_app_type] => utility [patent_app_number] => 18/384052 [patent_app_country] => US [patent_app_date] => 2023-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18384052 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/384052
Monatomic Single-Entity Baseplate Structure Employing a Thermoplastic Polyimide Bondline Between a Silicon Substrate and a Metallic Heat Sink Having Mismatched Coefficients of Thermal Oct 25, 2023 Pending
Array ( [id] => 18991117 [patent_doc_number] => 20240063086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => Monatomic Single-Entity Baseplate Structure Employing a Thermoplastic Polyimide Bondline Between a Silicon Substrate and a Metallic Heat Sink Having Mismatched Coefficients of Thermal [patent_app_type] => utility [patent_app_number] => 18/384052 [patent_app_country] => US [patent_app_date] => 2023-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18384052 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/384052
Monatomic Single-Entity Baseplate Structure Employing a Thermoplastic Polyimide Bondline Between a Silicon Substrate and a Metallic Heat Sink Having Mismatched Coefficients of Thermal Oct 25, 2023 Pending
Array ( [id] => 18958882 [patent_doc_number] => 20240047209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/488979 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488979 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/488979
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE Oct 16, 2023 Pending
Array ( [id] => 19131089 [patent_doc_number] => 20240136442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/378688 [patent_app_country] => US [patent_app_date] => 2023-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31842 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18378688 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/378688
Semiconductor device and method for manufacturing semiconductor device Oct 10, 2023 Issued
Array ( [id] => 19131089 [patent_doc_number] => 20240136442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/378688 [patent_app_country] => US [patent_app_date] => 2023-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31842 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18378688 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/378688
Semiconductor device and method for manufacturing semiconductor device Oct 10, 2023 Issued
Array ( [id] => 19071174 [patent_doc_number] => 20240105600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => WIRING SUBSTRATE, WIRING STRUCTURE USING WIRING SUBSTRATE, ELECTRONIC COMPONENT MOUNTING PACKAGE, AND ELECTRONIC MODULE [patent_app_type] => utility [patent_app_number] => 18/474730 [patent_app_country] => US [patent_app_date] => 2023-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7901 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18474730 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/474730
WIRING SUBSTRATE, WIRING STRUCTURE USING WIRING SUBSTRATE, ELECTRONIC COMPONENT MOUNTING PACKAGE, AND ELECTRONIC MODULE Sep 25, 2023 Pending
Array ( [id] => 18898549 [patent_doc_number] => 20240014034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/472261 [patent_app_country] => US [patent_app_date] => 2023-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8395 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18472261 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/472261
Semiconductor device and method of forming the same Sep 21, 2023 Issued
Array ( [id] => 18882953 [patent_doc_number] => 20240006322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => CONTACT OVER ACTIVE GATE STRUCTURES WITH ETCH STOP LAYERS FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION [patent_app_type] => utility [patent_app_number] => 18/370198 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16027 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370198 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370198
Contact over active gate structures with etch stop layers for advanced integrated circuit structure fabrication Sep 18, 2023 Issued
Array ( [id] => 19101119 [patent_doc_number] => 20240120347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/470162 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17897 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18470162 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/470162
DISPLAY DEVICE Sep 18, 2023 Pending
Array ( [id] => 19038379 [patent_doc_number] => 20240088194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SIMULTANEOUS DUAL-BAND SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 18/244100 [patent_app_country] => US [patent_app_date] => 2023-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5254 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18244100 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/244100
SIMULTANEOUS DUAL-BAND SYSTEMS AND METHODS Sep 7, 2023 Pending
Array ( [id] => 19835792 [patent_doc_number] => 20250087578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 18/463297 [patent_app_country] => US [patent_app_date] => 2023-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8520 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18463297 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/463297
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF Sep 7, 2023 Pending
Array ( [id] => 19038379 [patent_doc_number] => 20240088194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SIMULTANEOUS DUAL-BAND SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 18/244100 [patent_app_country] => US [patent_app_date] => 2023-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5254 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18244100 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/244100
SIMULTANEOUS DUAL-BAND SYSTEMS AND METHODS Sep 7, 2023 Pending
Array ( [id] => 19835792 [patent_doc_number] => 20250087578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 18/463297 [patent_app_country] => US [patent_app_date] => 2023-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8520 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18463297 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/463297
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF Sep 7, 2023 Pending
Array ( [id] => 18812907 [patent_doc_number] => 20230387244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => PARTIAL METAL GRAIN SIZE CONTROL TO IMPROVE CMP LOADING EFFECT [patent_app_type] => utility [patent_app_number] => 18/447685 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10494 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447685 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447685
Partial metal grain size control to improve CMP loading effect Aug 9, 2023 Issued
Array ( [id] => 18812933 [patent_doc_number] => 20230387270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/232289 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18232289 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/232289
Method of manufacturing a semiconductor device and a semiconductor device Aug 8, 2023 Issued
Array ( [id] => 20245990 [patent_doc_number] => 12426335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Reducing k values of dielectric films through anneal [patent_app_type] => utility [patent_app_number] => 18/366460 [patent_app_country] => US [patent_app_date] => 2023-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 43 [patent_no_of_words] => 4419 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18366460 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/366460
Reducing k values of dielectric films through anneal Aug 6, 2023 Issued
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