Search

Andre C. Stevenson

Examiner (ID: 7041, Phone: (571)272-1683 , Office: P/2816 )

Most Active Art Unit
2812
Art Unit(s)
2817, 2816, 2812, 2899
Total Applications
1766
Issued Applications
1549
Pending Applications
118
Abandoned Applications
127

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14904893 [patent_doc_number] => 20190296212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => VERTICAL JOSEPHSON JUNCTION SUPERCONDUCTING DEVICE [patent_app_type] => utility [patent_app_number] => 16/246676 [patent_app_country] => US [patent_app_date] => 2019-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12692 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16246676 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/246676
Vertical josephson junction superconducting device Jan 13, 2019 Issued
Array ( [id] => 16356552 [patent_doc_number] => 10797070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Three-dimensional memory device containing a replacement buried source line and methods of making the same [patent_app_type] => utility [patent_app_number] => 16/241221 [patent_app_country] => US [patent_app_date] => 2019-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 67 [patent_figures_cnt] => 76 [patent_no_of_words] => 23271 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16241221 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/241221
Three-dimensional memory device containing a replacement buried source line and methods of making the same Jan 6, 2019 Issued
Array ( [id] => 15688023 [patent_doc_number] => 20200098675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => CHIP ON FILM, DISPLAY PANEL, DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/239575 [patent_app_country] => US [patent_app_date] => 2019-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4964 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16239575 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/239575
CHIP ON FILM, DISPLAY PANEL, DISPLAY DEVICE Jan 3, 2019 Abandoned
Array ( [id] => 16293552 [patent_doc_number] => 10770407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-08 [patent_title] => IC structure with interdigitated conductive elements between metal guard structures [patent_app_type] => utility [patent_app_number] => 16/240436 [patent_app_country] => US [patent_app_date] => 2019-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7425 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16240436 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/240436
IC structure with interdigitated conductive elements between metal guard structures Jan 3, 2019 Issued
Array ( [id] => 14573333 [patent_doc_number] => 20190214274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => INSULATING CONTACTING SPACER [patent_app_type] => utility [patent_app_number] => 16/240220 [patent_app_country] => US [patent_app_date] => 2019-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2354 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16240220 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/240220
INSULATING CONTACTING SPACER Jan 3, 2019 Abandoned
Array ( [id] => 15889725 [patent_doc_number] => 10651218 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-05-12 [patent_title] => Optical sensor structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/239080 [patent_app_country] => US [patent_app_date] => 2019-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5955 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16239080 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/239080
Optical sensor structure and method for forming the same Jan 2, 2019 Issued
Array ( [id] => 15539517 [patent_doc_number] => 10569520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Wafer debonding system and method [patent_app_type] => utility [patent_app_number] => 16/220163 [patent_app_country] => US [patent_app_date] => 2018-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 6607 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16220163 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/220163
Wafer debonding system and method Dec 13, 2018 Issued
Array ( [id] => 17529894 [patent_doc_number] => 11302592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Semiconductor package having a stiffener ring [patent_app_type] => utility [patent_app_number] => 16/217016 [patent_app_country] => US [patent_app_date] => 2018-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 28 [patent_no_of_words] => 8403 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16217016 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/217016
Semiconductor package having a stiffener ring Dec 10, 2018 Issued
Array ( [id] => 15427943 [patent_doc_number] => 10546911 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => Organic light-emitting display panel and electronic device [patent_app_type] => utility [patent_app_number] => 16/203640 [patent_app_country] => US [patent_app_date] => 2018-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 8541 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16203640 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/203640
Organic light-emitting display panel and electronic device Nov 28, 2018 Issued
Array ( [id] => 14447021 [patent_doc_number] => 20190181384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => SUB-ELECTRODE MICROLENS ARRAY FOR ORGANIC LIGHT EMITTING DEVICES [patent_app_type] => utility [patent_app_number] => 16/193105 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9309 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16193105 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/193105
Sub-electrode microlens array for organic light emitting devices Nov 15, 2018 Issued
Array ( [id] => 14446261 [patent_doc_number] => 20190181004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => GAP FILL USING CARBON-BASED FILMS [patent_app_type] => utility [patent_app_number] => 16/194102 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6880 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16194102 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/194102
Gap fill using carbon-based films Nov 15, 2018 Issued
Array ( [id] => 13963329 [patent_doc_number] => 20190058009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-21 [patent_title] => Integrated Circuit System With Memory Support And Method Of Manufacture Thereof [patent_app_type] => utility [patent_app_number] => 16/167107 [patent_app_country] => US [patent_app_date] => 2018-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8362 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -34 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16167107 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/167107
Integrated circuit system with memory support and method of manufacture thereof Oct 21, 2018 Issued
Array ( [id] => 13936041 [patent_doc_number] => 20190051536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => DOUBLE PATTERNING METHOD [patent_app_type] => utility [patent_app_number] => 16/161374 [patent_app_country] => US [patent_app_date] => 2018-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16161374 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/161374
Double patterning method Oct 15, 2018 Issued
Array ( [id] => 15515753 [patent_doc_number] => 10564459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Manufacturing method for liquid crystal display device [patent_app_type] => utility [patent_app_number] => 16/161988 [patent_app_country] => US [patent_app_date] => 2018-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 6832 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16161988 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/161988
Manufacturing method for liquid crystal display device Oct 15, 2018 Issued
Array ( [id] => 18891113 [patent_doc_number] => 11869891 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Non-planar integrated circuit structures having mitigated source or drain etch from replacement gate process [patent_app_type] => utility [patent_app_number] => 16/146808 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 43 [patent_no_of_words] => 15788 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16146808 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/146808
Non-planar integrated circuit structures having mitigated source or drain etch from replacement gate process Sep 27, 2018 Issued
Array ( [id] => 15717973 [patent_doc_number] => 20200105754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => ARSENIC-DOPED EPITAXIAL SOURCE/DRAIN REGIONS FOR NMOS [patent_app_type] => utility [patent_app_number] => 16/145375 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12525 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16145375 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/145375
Arsenic-doped epitaxial, source/drain regions for NMOS Sep 27, 2018 Issued
Array ( [id] => 15717977 [patent_doc_number] => 20200105756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CHANNEL STRUCTURES USING BOTTOM-UP APPROACH [patent_app_type] => utility [patent_app_number] => 16/146800 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15128 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16146800 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/146800
Gate-all-around integrated circuit structures having depopulated channel structures using bottom-up approach Sep 27, 2018 Issued
Array ( [id] => 15717809 [patent_doc_number] => 20200105672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => CONTACT OVER ACTIVE GATE STRUCTURES WITH ETCH STOP LAYERS FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION [patent_app_type] => utility [patent_app_number] => 16/147541 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15972 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147541 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/147541
Contact over active gate structures with etch stop layers for advanced integrated circuit structure fabrication Sep 27, 2018 Issued
Array ( [id] => 19376739 [patent_doc_number] => 12068319 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => High performance semiconductor oxide material channel regions for NMOS [patent_app_type] => utility [patent_app_number] => 16/141000 [patent_app_country] => US [patent_app_date] => 2018-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 12455 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16141000 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/141000
High performance semiconductor oxide material channel regions for NMOS Sep 24, 2018 Issued
Array ( [id] => 16218732 [patent_doc_number] => 10734555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Light emitting device [patent_app_type] => utility [patent_app_number] => 16/134002 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 7342 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16134002 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/134002
Light emitting device Sep 17, 2018 Issued
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