Search

Andre C. Stevenson

Examiner (ID: 7041, Phone: (571)272-1683 , Office: P/2816 )

Most Active Art Unit
2812
Art Unit(s)
2817, 2816, 2812, 2899
Total Applications
1766
Issued Applications
1549
Pending Applications
118
Abandoned Applications
127

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6401089 [patent_doc_number] => 20100148365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'GRID ARRAY CONNECTION DEVICE AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/714310 [patent_app_country] => US [patent_app_date] => 2010-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3731 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20100148365.pdf [firstpage_image] =>[orig_patent_app_number] => 12714310 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/714310
Grid array connection device and method Feb 25, 2010 Issued
Array ( [id] => 5936946 [patent_doc_number] => 20110212590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'HIGH TEMPERATURE IMPLANTATION METHOD FOR STRESSOR FORMATION' [patent_app_type] => utility [patent_app_number] => 12/713735 [patent_app_country] => US [patent_app_date] => 2010-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3583 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20110212590.pdf [firstpage_image] =>[orig_patent_app_number] => 12713735 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/713735
HIGH TEMPERATURE IMPLANTATION METHOD FOR STRESSOR FORMATION Feb 25, 2010 Abandoned
Array ( [id] => 13228671 [patent_doc_number] => 10128115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-13 [patent_title] => Method of forming ultra-shallow junctions in semiconductor devices [patent_app_type] => utility [patent_app_number] => 12/713356 [patent_app_country] => US [patent_app_date] => 2010-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3428 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12713356 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/713356
Method of forming ultra-shallow junctions in semiconductor devices Feb 25, 2010 Issued
Array ( [id] => 6047808 [patent_doc_number] => 20110207329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'DOUBLE PATTERNING STRATEGY FOR CONTACT HOLE AND TRENCH IN PHOTOLITHOGRAPHY' [patent_app_type] => utility [patent_app_number] => 12/712515 [patent_app_country] => US [patent_app_date] => 2010-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4809 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20110207329.pdf [firstpage_image] =>[orig_patent_app_number] => 12712515 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/712515
Double patterning strategy for contact hole and trench in photolithography Feb 24, 2010 Issued
Array ( [id] => 6560627 [patent_doc_number] => 20100233833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-16 [patent_title] => 'Method for Producing Ink-Jet Head' [patent_app_type] => utility [patent_app_number] => 12/712026 [patent_app_country] => US [patent_app_date] => 2010-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4537 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20100233833.pdf [firstpage_image] =>[orig_patent_app_number] => 12712026 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/712026
Method for producing ink-jet head Feb 23, 2010 Issued
Array ( [id] => 6508198 [patent_doc_number] => 20100216264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'METHOD OF MANUFACTURING A SUBSTRATE FOR A LIQUID DISCHARGE HEAD' [patent_app_type] => utility [patent_app_number] => 12/709544 [patent_app_country] => US [patent_app_date] => 2010-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5439 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20100216264.pdf [firstpage_image] =>[orig_patent_app_number] => 12709544 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/709544
Method of manufacturing a substrate for a liquid discharge head Feb 21, 2010 Issued
Array ( [id] => 6047737 [patent_doc_number] => 20110207283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'HIGH TEMPERATURE ATOMIC LAYER DEPOSITION OF DIELECTRIC OXIDES' [patent_app_type] => utility [patent_app_number] => 12/710185 [patent_app_country] => US [patent_app_date] => 2010-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8652 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20110207283.pdf [firstpage_image] =>[orig_patent_app_number] => 12710185 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/710185
High temperature atomic layer deposition of dielectric oxides Feb 21, 2010 Issued
Array ( [id] => 7490573 [patent_doc_number] => 08030214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-04 [patent_title] => 'Method of fabricating gate structures' [patent_app_type] => utility [patent_app_number] => 12/708586 [patent_app_country] => US [patent_app_date] => 2010-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3002 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/030/08030214.pdf [firstpage_image] =>[orig_patent_app_number] => 12708586 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/708586
Method of fabricating gate structures Feb 18, 2010 Issued
Array ( [id] => 6508484 [patent_doc_number] => 20100216289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'Method of fabricating semiconductor device having metal-semiconductor compound regions' [patent_app_type] => utility [patent_app_number] => 12/656885 [patent_app_country] => US [patent_app_date] => 2010-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8486 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20100216289.pdf [firstpage_image] =>[orig_patent_app_number] => 12656885 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/656885
Method of fabricating semiconductor device having metal-semiconductor compound regions Feb 17, 2010 Issued
Array ( [id] => 4469511 [patent_doc_number] => 07943496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-17 [patent_title] => 'Method of manufacturing GaN-based transistors' [patent_app_type] => utility [patent_app_number] => 12/707376 [patent_app_country] => US [patent_app_date] => 2010-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5792 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/943/07943496.pdf [firstpage_image] =>[orig_patent_app_number] => 12707376 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/707376
Method of manufacturing GaN-based transistors Feb 16, 2010 Issued
Array ( [id] => 8328485 [patent_doc_number] => 08236581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Method of manufacturing semiconductor light emitting device' [patent_app_type] => utility [patent_app_number] => 12/706335 [patent_app_country] => US [patent_app_date] => 2010-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2551 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12706335 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/706335
Method of manufacturing semiconductor light emitting device Feb 15, 2010 Issued
Array ( [id] => 9827734 [patent_doc_number] => 08936962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-20 [patent_title] => 'Optical modulator and method for manufacturing same' [patent_app_type] => utility [patent_app_number] => 13/256087 [patent_app_country] => US [patent_app_date] => 2010-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 27 [patent_no_of_words] => 7131 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13256087 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/256087
Optical modulator and method for manufacturing same Feb 14, 2010 Issued
Array ( [id] => 8005837 [patent_doc_number] => 08084319 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Precisely tuning feature sizes on hard masks via plasma treatment' [patent_app_type] => utility [patent_app_number] => 12/704665 [patent_app_country] => US [patent_app_date] => 2010-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 5430 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/084/08084319.pdf [firstpage_image] =>[orig_patent_app_number] => 12704665 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/704665
Precisely tuning feature sizes on hard masks via plasma treatment Feb 11, 2010 Issued
Array ( [id] => 6295080 [patent_doc_number] => 20100240177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/704745 [patent_app_country] => US [patent_app_date] => 2010-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5325 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0240/20100240177.pdf [firstpage_image] =>[orig_patent_app_number] => 12704745 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/704745
Method of manufacturing semiconductor device Feb 11, 2010 Issued
Array ( [id] => 9523997 [patent_doc_number] => 08748260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-10 [patent_title] => 'Method for manufacturing nano-crystalline silicon material for semiconductor integrated circuits' [patent_app_type] => utility [patent_app_number] => 12/704495 [patent_app_country] => US [patent_app_date] => 2010-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3798 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12704495 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/704495
Method for manufacturing nano-crystalline silicon material for semiconductor integrated circuits Feb 10, 2010 Issued
Array ( [id] => 7558880 [patent_doc_number] => 20110272711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/144159 [patent_app_country] => US [patent_app_date] => 2010-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10756 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20110272711.pdf [firstpage_image] =>[orig_patent_app_number] => 13144159 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/144159
Method of manufacturing semiconductor device, semiconductor device, and semiconductor apparatus Jan 12, 2010 Issued
Array ( [id] => 7558862 [patent_doc_number] => 20110272693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'MANUFACTURING METHOD OF ULTRASONIC PROBE AND ULTRASONIC PROBE' [patent_app_type] => utility [patent_app_number] => 13/144229 [patent_app_country] => US [patent_app_date] => 2010-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10469 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20110272693.pdf [firstpage_image] =>[orig_patent_app_number] => 13144229 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/144229
Manufacturing method of ultrasonic probe and ultrasonic probe Jan 5, 2010 Issued
Array ( [id] => 9245185 [patent_doc_number] => 08609465 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-17 [patent_title] => 'Semiconductor device manufacturing method' [patent_app_type] => utility [patent_app_number] => 13/376523 [patent_app_country] => US [patent_app_date] => 2009-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5531 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13376523 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/376523
Semiconductor device manufacturing method Oct 8, 2009 Issued
Array ( [id] => 8689884 [patent_doc_number] => 08389411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Method of managing substrate' [patent_app_type] => utility [patent_app_number] => 13/119985 [patent_app_country] => US [patent_app_date] => 2009-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4033 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13119985 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/119985
Method of managing substrate Oct 4, 2009 Issued
Array ( [id] => 6047738 [patent_doc_number] => 20110207284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'SOLID-STATE MEMORY MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 12/998482 [patent_app_country] => US [patent_app_date] => 2009-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4748 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20110207284.pdf [firstpage_image] =>[orig_patent_app_number] => 12998482 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/998482
Solid-state memory manufacturing method Sep 27, 2009 Issued
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