Search

Andres F. Munoz

Examiner (ID: 16760, Phone: (571)270-3346 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2818, 2897, 2894
Total Applications
939
Issued Applications
698
Pending Applications
97
Abandoned Applications
177

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15873851 [patent_doc_number] => 20200144329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => MEMORY CELL WITH INDEPENDENTLY-SIZED ELEMENTS [patent_app_type] => utility [patent_app_number] => 16/736252 [patent_app_country] => US [patent_app_date] => 2020-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7394 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16736252 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/736252
Memory cell with independently-sized elements Jan 6, 2020 Issued
Array ( [id] => 16936516 [patent_doc_number] => 20210202405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => APPARATUS INCLUDING AN ISOLATION ASSEMBLY [patent_app_type] => utility [patent_app_number] => 16/730856 [patent_app_country] => US [patent_app_date] => 2019-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16730856 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/730856
Apparatus including an isolation assembly Dec 29, 2019 Issued
Array ( [id] => 15873769 [patent_doc_number] => 20200144288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/730276 [patent_app_country] => US [patent_app_date] => 2019-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8920 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16730276 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/730276
Vertical memory devices and methods of manufacturing the same Dec 29, 2019 Issued
Array ( [id] => 15807955 [patent_doc_number] => 20200127120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => METHODS, APPARATUS, AND SYSTEM FOR REDUCING LEAKAGE CURRENT IN SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/721558 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3982 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16721558 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/721558
METHODS, APPARATUS, AND SYSTEM FOR REDUCING LEAKAGE CURRENT IN SEMICONDUCTOR DEVICES Dec 18, 2019 Abandoned
Array ( [id] => 16920447 [patent_doc_number] => 20210193539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/720603 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16720603 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/720603
Semiconductor devices and methods of manufacturing semiconductor devices Dec 18, 2019 Issued
Array ( [id] => 18032159 [patent_doc_number] => 11515359 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => Array substrate and display device [patent_app_type] => utility [patent_app_number] => 16/631251 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3114 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16631251 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/631251
Array substrate and display device Dec 17, 2019 Issued
Array ( [id] => 16081121 [patent_doc_number] => 20200194547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => Method for Forming a Superjunction Transistor Device [patent_app_type] => utility [patent_app_number] => 16/715816 [patent_app_country] => US [patent_app_date] => 2019-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12224 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16715816 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/715816
Method for forming a superjunction transistor device Dec 15, 2019 Issued
Array ( [id] => 16944229 [patent_doc_number] => 11056480 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Method of forming a TVS semiconductor device [patent_app_type] => utility [patent_app_number] => 16/704365 [patent_app_country] => US [patent_app_date] => 2019-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 6671 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16704365 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/704365
Method of forming a TVS semiconductor device Dec 4, 2019 Issued
Array ( [id] => 16348371 [patent_doc_number] => 20200313022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => SINGLE PHOTON DETECTOR AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/703120 [patent_app_country] => US [patent_app_date] => 2019-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16703120 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/703120
SINGLE PHOTON DETECTOR AND MANUFACTURING METHOD THEREOF Dec 3, 2019 Abandoned
Array ( [id] => 16715942 [patent_doc_number] => 20210083089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/702790 [patent_app_country] => US [patent_app_date] => 2019-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5654 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16702790 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/702790
SEMICONDUCTOR DEVICE Dec 3, 2019 Abandoned
Array ( [id] => 17716632 [patent_doc_number] => 11380631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Lead frame for multi-chip modules with integrated surge protection [patent_app_type] => utility [patent_app_number] => 16/697617 [patent_app_country] => US [patent_app_date] => 2019-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2892 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16697617 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/697617
Lead frame for multi-chip modules with integrated surge protection Nov 26, 2019 Issued
Array ( [id] => 17638055 [patent_doc_number] => 11348788 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Methods for device fabrication using pitch reduction [patent_app_type] => utility [patent_app_number] => 16/692440 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 10615 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16692440 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/692440
Methods for device fabrication using pitch reduction Nov 21, 2019 Issued
Array ( [id] => 16966285 [patent_doc_number] => 20210217784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => ARRAY SUBSTRATE, METHOD FOR MANUFACTURING ARRAY SUBSTRATE, AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/761335 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9904 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16761335 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/761335
ARRAY SUBSTRATE, METHOD FOR MANUFACTURING ARRAY SUBSTRATE, AND DISPLAY PANEL Nov 20, 2019 Abandoned
Array ( [id] => 17002631 [patent_doc_number] => 11081454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/687228 [patent_app_country] => US [patent_app_date] => 2019-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 27 [patent_no_of_words] => 11200 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16687228 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/687228
Semiconductor device and method of manufacturing the same Nov 17, 2019 Issued
Array ( [id] => 16409991 [patent_doc_number] => 10818555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-27 [patent_title] => Semiconductor device having planar transistor and FinFET [patent_app_type] => utility [patent_app_number] => 16/687605 [patent_app_country] => US [patent_app_date] => 2019-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7004 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16687605 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/687605
Semiconductor device having planar transistor and FinFET Nov 17, 2019 Issued
Array ( [id] => 15969885 [patent_doc_number] => 20200168694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 16/682879 [patent_app_country] => US [patent_app_date] => 2019-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7456 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16682879 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/682879
Display apparatus Nov 12, 2019 Issued
Array ( [id] => 17270567 [patent_doc_number] => 11195999 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Phase change material with reduced reset state resistance drift [patent_app_type] => utility [patent_app_number] => 16/682647 [patent_app_country] => US [patent_app_date] => 2019-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4463 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16682647 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/682647
Phase change material with reduced reset state resistance drift Nov 12, 2019 Issued
Array ( [id] => 16827813 [patent_doc_number] => 20210143106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => PACKAGED DEVICE CARRIER FOR THERMAL ENHANCEMENT OR SIGNAL REDISTRIBUTION OF PACKAGED SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/680044 [patent_app_country] => US [patent_app_date] => 2019-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10039 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16680044 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/680044
Packaged device carrier for thermal enhancement or signal redistribution of packaged semiconductor devices Nov 10, 2019 Issued
Array ( [id] => 17470287 [patent_doc_number] => 11276770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Gate controlled lateral bipolar junction/heterojunction transistors [patent_app_type] => utility [patent_app_number] => 16/674432 [patent_app_country] => US [patent_app_date] => 2019-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4083 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16674432 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/674432
Gate controlled lateral bipolar junction/heterojunction transistors Nov 4, 2019 Issued
Array ( [id] => 17137781 [patent_doc_number] => 11139348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 16/674050 [patent_app_country] => US [patent_app_date] => 2019-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 29 [patent_no_of_words] => 17151 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16674050 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/674050
Display device Nov 4, 2019 Issued
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