Search

Andrew J Oyer

Examiner (ID: 2471, Phone: (571)270-0347 , Office: P/1767 )

Most Active Art Unit
1767
Art Unit(s)
1767
Total Applications
638
Issued Applications
430
Pending Applications
78
Abandoned Applications
130

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4084235 [patent_doc_number] => 06025206 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Method for detecting defects' [patent_app_type] => 1 [patent_app_number] => 9/080085 [patent_app_country] => US [patent_app_date] => 1998-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 993 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/025/06025206.pdf [firstpage_image] =>[orig_patent_app_number] => 080085 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/080085
Method for detecting defects May 14, 1998 Issued
Array ( [id] => 4101972 [patent_doc_number] => 06051441 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'High-efficiency miniature magnetic integrated circuit structures' [patent_app_type] => 1 [patent_app_number] => 9/083272 [patent_app_country] => US [patent_app_date] => 1998-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 35 [patent_no_of_words] => 11013 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/051/06051441.pdf [firstpage_image] =>[orig_patent_app_number] => 083272 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/083272
High-efficiency miniature magnetic integrated circuit structures May 11, 1998 Issued
Array ( [id] => 4145557 [patent_doc_number] => 06060773 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Semiconductor chip and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/074437 [patent_app_country] => US [patent_app_date] => 1998-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 4857 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/060/06060773.pdf [firstpage_image] =>[orig_patent_app_number] => 074437 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/074437
Semiconductor chip and method of manufacturing the same May 6, 1998 Issued
Array ( [id] => 4070291 [patent_doc_number] => 06008503 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Oxide film thickness standards' [patent_app_type] => 1 [patent_app_number] => 9/064800 [patent_app_country] => US [patent_app_date] => 1998-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3412 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/008/06008503.pdf [firstpage_image] =>[orig_patent_app_number] => 064800 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/064800
Oxide film thickness standards Apr 21, 1998 Issued
Array ( [id] => 4094005 [patent_doc_number] => 06096566 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Inter-conductive layer fuse for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 9/064633 [patent_app_country] => US [patent_app_date] => 1998-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3972 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/096/06096566.pdf [firstpage_image] =>[orig_patent_app_number] => 064633 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/064633
Inter-conductive layer fuse for integrated circuits Apr 21, 1998 Issued
Array ( [id] => 4113537 [patent_doc_number] => 06046060 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Method of making a high planarity, low CTE base for semiconductor reliability screening' [patent_app_type] => 1 [patent_app_number] => 9/062530 [patent_app_country] => US [patent_app_date] => 1998-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 38 [patent_no_of_words] => 18043 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/046/06046060.pdf [firstpage_image] =>[orig_patent_app_number] => 062530 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/062530
Method of making a high planarity, low CTE base for semiconductor reliability screening Apr 16, 1998 Issued
Array ( [id] => 4190907 [patent_doc_number] => 06130103 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Method for fabricating ferroelectric integrated circuits' [patent_app_type] => 1 [patent_app_number] => 9/062283 [patent_app_country] => US [patent_app_date] => 1998-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 11260 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130103.pdf [firstpage_image] =>[orig_patent_app_number] => 062283 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/062283
Method for fabricating ferroelectric integrated circuits Apr 16, 1998 Issued
Array ( [id] => 4102324 [patent_doc_number] => 06100189 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Second implant for agglomeration control' [patent_app_type] => 1 [patent_app_number] => 9/057908 [patent_app_country] => US [patent_app_date] => 1998-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2572 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100189.pdf [firstpage_image] =>[orig_patent_app_number] => 057908 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/057908
Second implant for agglomeration control Apr 8, 1998 Issued
Array ( [id] => 4182462 [patent_doc_number] => 06159761 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Method of manufacturing a force sensor having an electrode which changes resistance or electrostatic capacitance in response to force' [patent_app_type] => 1 [patent_app_number] => 9/054573 [patent_app_country] => US [patent_app_date] => 1998-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 44 [patent_no_of_words] => 17339 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/159/06159761.pdf [firstpage_image] =>[orig_patent_app_number] => 054573 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/054573
Method of manufacturing a force sensor having an electrode which changes resistance or electrostatic capacitance in response to force Apr 2, 1998 Issued
Array ( [id] => 4099967 [patent_doc_number] => 06066538 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Methods and apparatus for forming integrated circuit capacitors having composite oxide-nitride-oxide dielectric layers therein' [patent_app_type] => 1 [patent_app_number] => 9/048393 [patent_app_country] => US [patent_app_date] => 1998-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 4433 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/066/06066538.pdf [firstpage_image] =>[orig_patent_app_number] => 048393 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/048393
Methods and apparatus for forming integrated circuit capacitors having composite oxide-nitride-oxide dielectric layers therein Mar 25, 1998 Issued
Array ( [id] => 4085634 [patent_doc_number] => 06017799 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-25 [patent_title] => 'Method of fabricating dynamic random memory' [patent_app_type] => 1 [patent_app_number] => 9/040553 [patent_app_country] => US [patent_app_date] => 1998-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 2932 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/017/06017799.pdf [firstpage_image] =>[orig_patent_app_number] => 040553 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/040553
Method of fabricating dynamic random memory Mar 17, 1998 Issued
Array ( [id] => 4183496 [patent_doc_number] => 06159832 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Precision laser metallization' [patent_app_type] => 1 [patent_app_number] => 9/040610 [patent_app_country] => US [patent_app_date] => 1998-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5135 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/159/06159832.pdf [firstpage_image] =>[orig_patent_app_number] => 040610 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/040610
Precision laser metallization Mar 17, 1998 Issued
Array ( [id] => 4190569 [patent_doc_number] => 06093933 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'Method and apparatus for fabricating electronic device' [patent_app_type] => 1 [patent_app_number] => 9/039230 [patent_app_country] => US [patent_app_date] => 1998-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1602 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/093/06093933.pdf [firstpage_image] =>[orig_patent_app_number] => 039230 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/039230
Method and apparatus for fabricating electronic device Mar 15, 1998 Issued
Array ( [id] => 4136251 [patent_doc_number] => 06015717 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'Method for monitoring rapid thermal process integrity' [patent_app_type] => 1 [patent_app_number] => 9/042331 [patent_app_country] => US [patent_app_date] => 1998-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1758 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/015/06015717.pdf [firstpage_image] =>[orig_patent_app_number] => 042331 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/042331
Method for monitoring rapid thermal process integrity Mar 12, 1998 Issued
Array ( [id] => 4212377 [patent_doc_number] => 06028341 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Latch up protection and yield improvement device for IC array' [patent_app_type] => 1 [patent_app_number] => 9/036817 [patent_app_country] => US [patent_app_date] => 1998-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1670 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/028/06028341.pdf [firstpage_image] =>[orig_patent_app_number] => 036817 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/036817
Latch up protection and yield improvement device for IC array Mar 8, 1998 Issued
Array ( [id] => 4209571 [patent_doc_number] => 06078058 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'SOI floating body charge monitor circuit and method' [patent_app_type] => 1 [patent_app_number] => 9/035407 [patent_app_country] => US [patent_app_date] => 1998-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2949 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/078/06078058.pdf [firstpage_image] =>[orig_patent_app_number] => 035407 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/035407
SOI floating body charge monitor circuit and method Mar 4, 1998 Issued
09/046559 METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A HETEROEPITAXIAL LAYER Feb 26, 1998 Issued
Array ( [id] => 4086393 [patent_doc_number] => 06133059 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Integrated micromechanical sensor device and process for producing it' [patent_app_type] => 1 [patent_app_number] => 9/030229 [patent_app_country] => US [patent_app_date] => 1998-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3397 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133059.pdf [firstpage_image] =>[orig_patent_app_number] => 030229 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/030229
Integrated micromechanical sensor device and process for producing it Feb 24, 1998 Issued
Array ( [id] => 4169722 [patent_doc_number] => 06140229 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Semiconductor apparatus and method of producing same' [patent_app_type] => 1 [patent_app_number] => 9/027149 [patent_app_country] => US [patent_app_date] => 1998-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 4942 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/140/06140229.pdf [firstpage_image] =>[orig_patent_app_number] => 027149 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/027149
Semiconductor apparatus and method of producing same Feb 19, 1998 Issued
Array ( [id] => 4086295 [patent_doc_number] => 06133052 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Bump inspection method' [patent_app_type] => 1 [patent_app_number] => 9/027341 [patent_app_country] => US [patent_app_date] => 1998-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 5231 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133052.pdf [firstpage_image] =>[orig_patent_app_number] => 027341 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/027341
Bump inspection method Feb 19, 1998 Issued
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