![](/images/general/no_picture/200_user.png)
Andrew M Falik
Examiner (ID: 2395)
Most Active Art Unit | 2407 |
Art Unit(s) | 3401, 3505, 3765, 3727, 3741, 2407, 3408, 2899 |
Total Applications | 2593 |
Issued Applications | 2494 |
Pending Applications | 22 |
Abandoned Applications | 77 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 3932207
[patent_doc_number] => 05952724
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-14
[patent_title] => 'Semiconductor device incorporating a stepped contact hole'
[patent_app_type] => 1
[patent_app_number] => 8/878947
[patent_app_country] => US
[patent_app_date] => 1997-06-19
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/952/05952724.pdf
[firstpage_image] =>[orig_patent_app_number] => 878947
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/878947 | Semiconductor device incorporating a stepped contact hole | Jun 18, 1997 | Issued |
Array
(
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[patent_doc_number] => 05773856
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[patent_kind] => NA
[patent_issue_date] => 1998-06-30
[patent_title] => 'Structure for connecting to integrated circuitry'
[patent_app_type] => 1
[patent_app_number] => 8/878452
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[patent_app_date] => 1997-06-18
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[firstpage_image] =>[orig_patent_app_number] => 878452
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/878452 | Structure for connecting to integrated circuitry | Jun 17, 1997 | Issued |
Array
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[patent_doc_number] => 06011308
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[patent_issue_date] => 2000-01-04
[patent_title] => 'Semiconductor device having a barrier film formed to prevent the entry of moisture and method of manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 8/874359
[patent_app_country] => US
[patent_app_date] => 1997-06-13
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[pdf_file] => patents/06/011/06011308.pdf
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Array
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[id] => 3990182
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[patent_issue_date] => 1999-09-28
[patent_title] => 'Device mounting a semiconductor element on a wiring substrate including an adhesive material having first and second adhesive components with different cure characteristics'
[patent_app_type] => 1
[patent_app_number] => 8/874277
[patent_app_country] => US
[patent_app_date] => 1997-06-13
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Array
(
[id] => 3940855
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[patent_issue_date] => 1999-07-27
[patent_title] => 'Reticle semiconductor wafer, and semiconductor chip'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/874713 | Reticle semiconductor wafer, and semiconductor chip | Jun 12, 1997 | Issued |
Array
(
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[patent_title] => 'Alignment mark for use in making semiconductor devices'
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[firstpage_image] =>[orig_patent_app_number] => 873563
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/873563 | Alignment mark for use in making semiconductor devices | Jun 11, 1997 | Issued |
Array
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[patent_issue_date] => 1999-10-26
[patent_title] => 'Camouflaged circuit structure with step implants'
[patent_app_type] => 1
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[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/869524 | Camouflaged circuit structure with step implants | Jun 5, 1997 | Issued |
Array
(
[id] => 3984680
[patent_doc_number] => 05949098
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[patent_issue_date] => 1999-09-07
[patent_title] => 'Semiconductor integrated circuit having an improved arrangement of power supply lines to reduce noise occurring therein'
[patent_app_type] => 1
[patent_app_number] => 8/868474
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[patent_app_date] => 1997-06-03
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[pdf_file] => patents/05/949/05949098.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/868474 | Semiconductor integrated circuit having an improved arrangement of power supply lines to reduce noise occurring therein | Jun 2, 1997 | Issued |
Array
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[id] => 4013495
[patent_doc_number] => 05889314
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[patent_issue_date] => 1999-03-30
[patent_title] => 'Mixed-mode IC having an isolator for minimizing cross-talk through substrate and method of fabricating same'
[patent_app_type] => 1
[patent_app_number] => 8/868259
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/868259 | Mixed-mode IC having an isolator for minimizing cross-talk through substrate and method of fabricating same | Jun 2, 1997 | Issued |
Array
(
[id] => 4019718
[patent_doc_number] => 05880493
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[patent_issue_date] => 1999-03-09
[patent_title] => 'Semiconductor integrated circuit devices adapted for automatic design and method of arranging such devices'
[patent_app_type] => 1
[patent_app_number] => 8/868046
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[patent_app_date] => 1997-06-03
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Array
(
[id] => 3998357
[patent_doc_number] => 05892266
[patent_country] => US
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[patent_issue_date] => 1999-04-06
[patent_title] => 'Layout structure of capacitive element(s) and interconnections in a semiconductor'
[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/865442 | Layout structure of capacitive element(s) and interconnections in a semiconductor | May 29, 1997 | Issued |
Array
(
[id] => 4070374
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[patent_title] => 'Silicon on insulator master slice semiconductor integrated circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/865328 | Silicon on insulator master slice semiconductor integrated circuit | May 28, 1997 | Issued |
Array
(
[id] => 3874643
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[patent_title] => 'Trench sidewall patterned by vapor phase etching'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/865261 | Trench sidewall patterned by vapor phase etching | May 28, 1997 | Issued |
Array
(
[id] => 3896062
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[patent_issue_date] => 1998-11-10
[patent_title] => 'Structure for making sub-lithographic images by the intersection of two spacers'
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Array
(
[id] => 3980351
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[patent_title] => 'Gate array system in which functional blocks are connected by fixed wiring'
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Array
(
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/858004 | Spherical shaped semiconductor integrated circuit | May 15, 1997 | Issued |