![](/images/general/no_picture/200_user.png)
Andrew M Falik
Examiner (ID: 2395)
Most Active Art Unit | 2407 |
Art Unit(s) | 3401, 3505, 3765, 3727, 3741, 2407, 3408, 2899 |
Total Applications | 2593 |
Issued Applications | 2494 |
Pending Applications | 22 |
Abandoned Applications | 77 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 3998302
[patent_doc_number] => 05892261
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-06
[patent_title] => 'SRAM bitline pull-up MOSFET structure for internal circuit electro-static discharge immunity'
[patent_app_type] => 1
[patent_app_number] => 8/780670
[patent_app_country] => US
[patent_app_date] => 1997-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3683
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/892/05892261.pdf
[firstpage_image] =>[orig_patent_app_number] => 780670
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/780670 | SRAM bitline pull-up MOSFET structure for internal circuit electro-static discharge immunity | Jan 6, 1997 | Issued |
Array
(
[id] => 3765661
[patent_doc_number] => 05742083
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-21
[patent_title] => 'Electrostatic discharge protection metal-oxide semiconductor field-effect transistor with segmented diffusion regions'
[patent_app_type] => 1
[patent_app_number] => 8/778742
[patent_app_country] => US
[patent_app_date] => 1997-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3856
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/742/05742083.pdf
[firstpage_image] =>[orig_patent_app_number] => 778742
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/778742 | Electrostatic discharge protection metal-oxide semiconductor field-effect transistor with segmented diffusion regions | Jan 1, 1997 | Issued |
Array
(
[id] => 3903550
[patent_doc_number] => 05751025
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-12
[patent_title] => 'High voltage current limiter and method for making'
[patent_app_type] => 1
[patent_app_number] => 8/778432
[patent_app_country] => US
[patent_app_date] => 1997-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 10
[patent_no_of_words] => 4981
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/751/05751025.pdf
[firstpage_image] =>[orig_patent_app_number] => 778432
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/778432 | High voltage current limiter and method for making | Jan 1, 1997 | Issued |
Array
(
[id] => 4227726
[patent_doc_number] => 06011298
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-01-04
[patent_title] => 'High voltage termination with buried field-shaping region'
[patent_app_type] => 1
[patent_app_number] => 8/775632
[patent_app_country] => US
[patent_app_date] => 1996-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 4156
[patent_no_of_claims] => 53
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/011/06011298.pdf
[firstpage_image] =>[orig_patent_app_number] => 775632
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/775632 | High voltage termination with buried field-shaping region | Dec 30, 1996 | Issued |
Array
(
[id] => 3766541
[patent_doc_number] => 05844280
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-01
[patent_title] => 'Device for protecting a semiconductor circuit'
[patent_app_type] => 1
[patent_app_number] => 8/774618
[patent_app_country] => US
[patent_app_date] => 1996-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2428
[patent_no_of_claims] => 12
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[patent_words_short_claim] => 185
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/844/05844280.pdf
[firstpage_image] =>[orig_patent_app_number] => 774618
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/774618 | Device for protecting a semiconductor circuit | Dec 29, 1996 | Issued |
Array
(
[id] => 3874658
[patent_doc_number] => 05838056
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-17
[patent_title] => 'Semiconductor device applied to composite insulative film and manufacturing method thereof'
[patent_app_type] => 1
[patent_app_number] => 8/777100
[patent_app_country] => US
[patent_app_date] => 1996-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 21
[patent_no_of_words] => 7549
[patent_no_of_claims] => 21
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/838/05838056.pdf
[firstpage_image] =>[orig_patent_app_number] => 777100
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/777100 | Semiconductor device applied to composite insulative film and manufacturing method thereof | Dec 29, 1996 | Issued |
Array
(
[id] => 3896192
[patent_doc_number] => 05834825
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-10
[patent_title] => 'Semiconductor device having spiral wiring directly covered with an insulating layer containing ferromagnetic particles'
[patent_app_type] => 1
[patent_app_number] => 8/773206
[patent_app_country] => US
[patent_app_date] => 1996-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 16
[patent_no_of_words] => 4555
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/834/05834825.pdf
[firstpage_image] =>[orig_patent_app_number] => 773206
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/773206 | Semiconductor device having spiral wiring directly covered with an insulating layer containing ferromagnetic particles | Dec 22, 1996 | Issued |
Array
(
[id] => 3847147
[patent_doc_number] => 05708283
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-13
[patent_title] => 'Flip chip high power monolithic integrated circuit thermal bumps'
[patent_app_type] => 1
[patent_app_number] => 8/771458
[patent_app_country] => US
[patent_app_date] => 1996-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3451
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 255
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/708/05708283.pdf
[firstpage_image] =>[orig_patent_app_number] => 771458
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/771458 | Flip chip high power monolithic integrated circuit thermal bumps | Dec 19, 1996 | Issued |
Array
(
[id] => 3780299
[patent_doc_number] => 05808346
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-15
[patent_title] => 'Semiconductor device structure which provides individually controllable body-terminal voltage of MOS transistors'
[patent_app_type] => 1
[patent_app_number] => 8/770422
[patent_app_country] => US
[patent_app_date] => 1996-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 56
[patent_no_of_words] => 14109
[patent_no_of_claims] => 19
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/808/05808346.pdf
[firstpage_image] =>[orig_patent_app_number] => 770422
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/770422 | Semiconductor device structure which provides individually controllable body-terminal voltage of MOS transistors | Dec 19, 1996 | Issued |
Array
(
[id] => 3794297
[patent_doc_number] => 05841157
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-24
[patent_title] => 'Semiconductor integrated circuit including a high density cell'
[patent_app_type] => 1
[patent_app_number] => 8/772050
[patent_app_country] => US
[patent_app_date] => 1996-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 18
[patent_no_of_words] => 6819
[patent_no_of_claims] => 4
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/841/05841157.pdf
[firstpage_image] =>[orig_patent_app_number] => 772050
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/772050 | Semiconductor integrated circuit including a high density cell | Dec 18, 1996 | Issued |
Array
(
[id] => 3797541
[patent_doc_number] => 05726478
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-10
[patent_title] => 'Integrated power semiconductor component having a substrate with a protective structure in the substrate'
[patent_app_type] => 1
[patent_app_number] => 8/769348
[patent_app_country] => US
[patent_app_date] => 1996-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1975
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/726/05726478.pdf
[firstpage_image] =>[orig_patent_app_number] => 769348
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/769348 | Integrated power semiconductor component having a substrate with a protective structure in the substrate | Dec 18, 1996 | Issued |
Array
(
[id] => 3747871
[patent_doc_number] => 05801409
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-01
[patent_title] => 'Multiphase charge coupled device solid-state image sensors'
[patent_app_type] => 1
[patent_app_number] => 8/768802
[patent_app_country] => US
[patent_app_date] => 1996-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => patents/05/801/05801409.pdf
[firstpage_image] =>[orig_patent_app_number] => 768802
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/768802 | Multiphase charge coupled device solid-state image sensors | Dec 17, 1996 | Issued |
Array
(
[id] => 3799527
[patent_doc_number] => 05780905
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-14
[patent_title] => 'Asymmetrical, bidirectional triggering ESD structure'
[patent_app_type] => 1
[patent_app_number] => 8/768358
[patent_app_country] => US
[patent_app_date] => 1996-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/780/05780905.pdf
[firstpage_image] =>[orig_patent_app_number] => 768358
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/768358 | Asymmetrical, bidirectional triggering ESD structure | Dec 16, 1996 | Issued |
Array
(
[id] => 3844969
[patent_doc_number] => 05847427
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-08
[patent_title] => 'Non-volatile semiconductor memory device utilizing an oxidation suppressing substance to prevent the formation of bird\'s breaks'
[patent_app_type] => 1
[patent_app_number] => 8/767084
[patent_app_country] => US
[patent_app_date] => 1996-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/847/05847427.pdf
[firstpage_image] =>[orig_patent_app_number] => 767084
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/767084 | Non-volatile semiconductor memory device utilizing an oxidation suppressing substance to prevent the formation of bird's breaks | Dec 15, 1996 | Issued |
Array
(
[id] => 3780521
[patent_doc_number] => 05757073
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-26
[patent_title] => 'Heatsink and package structure for wirebond chip rework and replacement'
[patent_app_type] => 1
[patent_app_number] => 8/763372
[patent_app_country] => US
[patent_app_date] => 1996-12-13
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/757/05757073.pdf
[firstpage_image] =>[orig_patent_app_number] => 763372
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/763372 | Heatsink and package structure for wirebond chip rework and replacement | Dec 12, 1996 | Issued |
Array
(
[id] => 3812365
[patent_doc_number] => 05831311
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-03
[patent_title] => 'Electro-static discharge protection device having a threshold voltage adjustment area'
[patent_app_type] => 1
[patent_app_number] => 8/764216
[patent_app_country] => US
[patent_app_date] => 1996-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/831/05831311.pdf
[firstpage_image] =>[orig_patent_app_number] => 764216
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/764216 | Electro-static discharge protection device having a threshold voltage adjustment area | Dec 12, 1996 | Issued |
Array
(
[id] => 3929359
[patent_doc_number] => 05945713
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-31
[patent_title] => 'Electrostatic discharge protection circuits for mixed voltage interface and multi-rail disconnected power grid applications'
[patent_app_type] => 1
[patent_app_number] => 8/763998
[patent_app_country] => US
[patent_app_date] => 1996-12-12
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[pdf_file] => patents/05/945/05945713.pdf
[firstpage_image] =>[orig_patent_app_number] => 763998
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/763998 | Electrostatic discharge protection circuits for mixed voltage interface and multi-rail disconnected power grid applications | Dec 11, 1996 | Issued |
Array
(
[id] => 3882332
[patent_doc_number] => 05747837
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-05
[patent_title] => 'Semiconductor device having input protective function'
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[patent_app_number] => 8/763262
[patent_app_country] => US
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[pdf_file] => patents/05/747/05747837.pdf
[firstpage_image] =>[orig_patent_app_number] => 763262
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/763262 | Semiconductor device having input protective function | Dec 9, 1996 | Issued |
Array
(
[id] => 3774301
[patent_doc_number] => 05734189
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-31
[patent_title] => 'Low parasitic source inductance field-effect transistor device having via connections disposed along an outer periphery thereof'
[patent_app_type] => 1
[patent_app_number] => 8/762312
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[pdf_file] => patents/05/734/05734189.pdf
[firstpage_image] =>[orig_patent_app_number] => 762312
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/762312 | Low parasitic source inductance field-effect transistor device having via connections disposed along an outer periphery thereof | Dec 8, 1996 | Issued |
Array
(
[id] => 3883482
[patent_doc_number] => 05729048
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-17
[patent_title] => 'Cmos ic device suppressing spike noise'
[patent_app_type] => 1
[patent_app_number] => 8/759642
[patent_app_country] => US
[patent_app_date] => 1996-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 28
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[patent_words_short_claim] => 131
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/729/05729048.pdf
[firstpage_image] =>[orig_patent_app_number] => 759642
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/759642 | Cmos ic device suppressing spike noise | Dec 4, 1996 | Issued |