Search

Andrew Q. Tran

Examiner (ID: 7081)

Most Active Art Unit
2824
Art Unit(s)
2511, 2812, 2818, 2824, 2825, 2827
Total Applications
1878
Issued Applications
1746
Pending Applications
27
Abandoned Applications
106

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8521262 [patent_doc_number] => 20120320670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'FAST VERIFY FOR PHASE CHANGE MEMORY WITH SWITCH' [patent_app_type] => utility [patent_app_number] => 13/163916 [patent_app_country] => US [patent_app_date] => 2011-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9108 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13163916 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/163916
Fast verify for phase change memory with switch Jun 19, 2011 Issued
Array ( [id] => 7816622 [patent_doc_number] => 20120063242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'DATA RECEIVER AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/162948 [patent_app_country] => US [patent_app_date] => 2011-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12720 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20120063242.pdf [firstpage_image] =>[orig_patent_app_number] => 13162948 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/162948
Data receiver having an integration unit and a sense amplification unit, and semiconductor memory device including the same Jun 16, 2011 Issued
Array ( [id] => 9945892 [patent_doc_number] => 08995208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-31 [patent_title] => 'Static random access memory devices having read and write assist circuits therein that improve read and write reliability' [patent_app_type] => utility [patent_app_number] => 13/163346 [patent_app_country] => US [patent_app_date] => 2011-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8478 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13163346 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/163346
Static random access memory devices having read and write assist circuits therein that improve read and write reliability Jun 16, 2011 Issued
Array ( [id] => 9256042 [patent_doc_number] => 08619470 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'Semiconductor memory device with long data holding period' [patent_app_type] => utility [patent_app_number] => 13/161616 [patent_app_country] => US [patent_app_date] => 2011-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 35 [patent_no_of_words] => 24057 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13161616 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/161616
Semiconductor memory device with long data holding period Jun 15, 2011 Issued
Array ( [id] => 9456800 [patent_doc_number] => 08717817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Method for multi-page programming a non-volatile memory device by simultaneously activating a plurality of selection lines based on programmed data' [patent_app_type] => utility [patent_app_number] => 13/161940 [patent_app_country] => US [patent_app_date] => 2011-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 45 [patent_no_of_words] => 17033 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13161940 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/161940
Method for multi-page programming a non-volatile memory device by simultaneously activating a plurality of selection lines based on programmed data Jun 15, 2011 Issued
Array ( [id] => 9185407 [patent_doc_number] => 08625353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-07 [patent_title] => 'Method and apparatus for staggered start-up of a predefined, random, or dynamic number of flash memory devices' [patent_app_type] => utility [patent_app_number] => 13/162520 [patent_app_country] => US [patent_app_date] => 2011-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5214 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13162520 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/162520
Method and apparatus for staggered start-up of a predefined, random, or dynamic number of flash memory devices Jun 15, 2011 Issued
Array ( [id] => 9525763 [patent_doc_number] => 08750047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-10 [patent_title] => 'Circuit for reading non-volatile memory cells having a precharging circuit activated after the activation of a sense circuit' [patent_app_type] => utility [patent_app_number] => 13/161248 [patent_app_country] => US [patent_app_date] => 2011-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5022 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13161248 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/161248
Circuit for reading non-volatile memory cells having a precharging circuit activated after the activation of a sense circuit Jun 14, 2011 Issued
Array ( [id] => 7655788 [patent_doc_number] => 20110305057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-15 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE, MEMORY CONTROLLER, AND DATA PROCESSING SYSTEM INCLUDING THESE' [patent_app_type] => utility [patent_app_number] => 13/160198 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 17320 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0305/20110305057.pdf [firstpage_image] =>[orig_patent_app_number] => 13160198 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/160198
Semiconductor memory device incorporating an interface chip for selectively refreshing memory cells in core chips Jun 13, 2011 Issued
Array ( [id] => 10022055 [patent_doc_number] => 09064548 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-23 [patent_title] => 'Method for reading a third-dimensional embedded re-writeable non-volatile memory and registers' [patent_app_type] => utility [patent_app_number] => 13/134713 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3678 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13134713 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/134713
Method for reading a third-dimensional embedded re-writeable non-volatile memory and registers Jun 13, 2011 Issued
Array ( [id] => 7485181 [patent_doc_number] => 20110235439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'STATIC MEMORY CELL HAVING INDEPENDENT DATA HOLDING VOLTAGE' [patent_app_type] => utility [patent_app_number] => 13/154919 [patent_app_country] => US [patent_app_date] => 2011-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 13348 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20110235439.pdf [firstpage_image] =>[orig_patent_app_number] => 13154919 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/154919
Static memory cell having independent data holding voltage Jun 6, 2011 Issued
Array ( [id] => 7485149 [patent_doc_number] => 20110235430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'MEMORY DEVICE AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/154616 [patent_app_country] => US [patent_app_date] => 2011-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 14147 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20110235430.pdf [firstpage_image] =>[orig_patent_app_number] => 13154616 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/154616
Determining a logic state based on currents received by a sense amplifer Jun 6, 2011 Issued
Array ( [id] => 6013219 [patent_doc_number] => 20110222352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-15 [patent_title] => 'METHOD FOR PROGRAMMING A NON-VOLATILE MEMORY DEVICE TO REDUCE FLOATING-GATE-TO-FLOATING-GATE COUPLING EFFECT' [patent_app_type] => utility [patent_app_number] => 13/116861 [patent_app_country] => US [patent_app_date] => 2011-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4547 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20110222352.pdf [firstpage_image] =>[orig_patent_app_number] => 13116861 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/116861
Non-volatile memory device capable of reducing floating gate-to-floating gate coupling effect during programming May 25, 2011 Issued
Array ( [id] => 8726912 [patent_doc_number] => 08406046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Domain-wall motion type magnetic random access memory with inclined regions and initializing method' [patent_app_type] => utility [patent_app_number] => 13/112700 [patent_app_country] => US [patent_app_date] => 2011-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 8083 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13112700 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/112700
Domain-wall motion type magnetic random access memory with inclined regions and initializing method May 19, 2011 Issued
Array ( [id] => 9075896 [patent_doc_number] => 08553480 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Local IO sense accelerator for increasing read/write data transfer speed' [patent_app_type] => utility [patent_app_number] => 13/111958 [patent_app_country] => US [patent_app_date] => 2011-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2221 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13111958 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/111958
Local IO sense accelerator for increasing read/write data transfer speed May 19, 2011 Issued
Array ( [id] => 8250844 [patent_doc_number] => 20120155175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'FLASH MEMORY DEVICE AND OPERATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/111686 [patent_app_country] => US [patent_app_date] => 2011-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3057 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20120155175.pdf [firstpage_image] =>[orig_patent_app_number] => 13111686 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/111686
FLASH MEMORY DEVICE AND OPERATION METHOD THEREOF May 18, 2011 Abandoned
Array ( [id] => 8957451 [patent_doc_number] => 08503237 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-06 [patent_title] => 'System and method for data recovery in a solid state storage device' [patent_app_type] => utility [patent_app_number] => 13/110662 [patent_app_country] => US [patent_app_date] => 2011-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3582 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13110662 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/110662
System and method for data recovery in a solid state storage device May 17, 2011 Issued
Array ( [id] => 9155090 [patent_doc_number] => 08588000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-19 [patent_title] => 'Semiconductor memory device having a reading transistor with a back-gate electrode' [patent_app_type] => utility [patent_app_number] => 13/108636 [patent_app_country] => US [patent_app_date] => 2011-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 18595 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13108636 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/108636
Semiconductor memory device having a reading transistor with a back-gate electrode May 15, 2011 Issued
Array ( [id] => 6086662 [patent_doc_number] => 20110216621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'Synchronous Command-Based Write Recovery Time Auto Precharge Control' [patent_app_type] => utility [patent_app_number] => 13/108854 [patent_app_country] => US [patent_app_date] => 2011-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4076 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20110216621.pdf [firstpage_image] =>[orig_patent_app_number] => 13108854 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/108854
Synchronous command-based write recovery time auto-precharge control May 15, 2011 Issued
Array ( [id] => 8750784 [patent_doc_number] => 08416622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'Driving method of a semiconductor device with an inverted period having a negative potential applied to a gate of an oxide semiconductor transistor' [patent_app_type] => utility [patent_app_number] => 13/108252 [patent_app_country] => US [patent_app_date] => 2011-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 41 [patent_no_of_words] => 17090 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13108252 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/108252
Driving method of a semiconductor device with an inverted period having a negative potential applied to a gate of an oxide semiconductor transistor May 15, 2011 Issued
Array ( [id] => 7566191 [patent_doc_number] => 20110286254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'Semiconductor Devices Having a Three-Dimensional Stacked Structure and Methods of De-Skewing Data Therein' [patent_app_type] => utility [patent_app_number] => 13/108130 [patent_app_country] => US [patent_app_date] => 2011-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 15631 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0286/20110286254.pdf [firstpage_image] =>[orig_patent_app_number] => 13108130 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/108130
Semiconductor devices having a three-dimensional stacked structure and methods of de-skewing data therein May 15, 2011 Issued
Menu