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Andrew Sanders

Examiner (ID: 1323)

Most Active Art Unit
2509
Art Unit(s)
2509, 2504
Total Applications
463
Issued Applications
431
Pending Applications
2
Abandoned Applications
30

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3104574 [patent_doc_number] => 05315179 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-24 [patent_title] => 'BICMOS level converter circuit' [patent_app_type] => 1 [patent_app_number] => 7/951959 [patent_app_country] => US [patent_app_date] => 1992-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6967 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/315/05315179.pdf [firstpage_image] =>[orig_patent_app_number] => 951959 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/951959
BICMOS level converter circuit Sep 27, 1992 Issued
Array ( [id] => 3521149 [patent_doc_number] => 05576640 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-19 [patent_title] => 'CMOS driver for fast single-ended bus' [patent_app_type] => 1 [patent_app_number] => 7/952674 [patent_app_country] => US [patent_app_date] => 1992-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3261 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/576/05576640.pdf [firstpage_image] =>[orig_patent_app_number] => 952674 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/952674
CMOS driver for fast single-ended bus Sep 24, 1992 Issued
Array ( [id] => 2942502 [patent_doc_number] => 05260609 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-09 [patent_title] => 'Logic circuit uising transistor having negative differential conductance' [patent_app_type] => 1 [patent_app_number] => 7/945591 [patent_app_country] => US [patent_app_date] => 1992-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4907 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/260/05260609.pdf [firstpage_image] =>[orig_patent_app_number] => 945591 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/945591
Logic circuit uising transistor having negative differential conductance Sep 15, 1992 Issued
Array ( [id] => 3447115 [patent_doc_number] => 05430387 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-04 [patent_title] => 'Transition-controlled off-chip driver' [patent_app_type] => 1 [patent_app_number] => 7/945757 [patent_app_country] => US [patent_app_date] => 1992-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2970 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/430/05430387.pdf [firstpage_image] =>[orig_patent_app_number] => 945757 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/945757
Transition-controlled off-chip driver Sep 15, 1992 Issued
Array ( [id] => 3100738 [patent_doc_number] => 05293084 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-08 [patent_title] => 'High speed logic circuit' [patent_app_type] => 1 [patent_app_number] => 7/942181 [patent_app_country] => US [patent_app_date] => 1992-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 6847 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/293/05293084.pdf [firstpage_image] =>[orig_patent_app_number] => 942181 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/942181
High speed logic circuit Sep 8, 1992 Issued
Array ( [id] => 3466402 [patent_doc_number] => 05391939 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-21 [patent_title] => 'Output circuit of a semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 7/937067 [patent_app_country] => US [patent_app_date] => 1992-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 6573 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/391/05391939.pdf [firstpage_image] =>[orig_patent_app_number] => 937067 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/937067
Output circuit of a semiconductor integrated circuit Aug 27, 1992 Issued
Array ( [id] => 3450527 [patent_doc_number] => 05387825 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-07 [patent_title] => 'Glitch-eliminator circuit' [patent_app_type] => 1 [patent_app_number] => 7/932476 [patent_app_country] => US [patent_app_date] => 1992-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1897 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/387/05387825.pdf [firstpage_image] =>[orig_patent_app_number] => 932476 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/932476
Glitch-eliminator circuit Aug 19, 1992 Issued
Array ( [id] => 3032612 [patent_doc_number] => 05289430 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-22 [patent_title] => 'Self latching input buffer' [patent_app_type] => 1 [patent_app_number] => 7/931074 [patent_app_country] => US [patent_app_date] => 1992-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1723 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/289/05289430.pdf [firstpage_image] =>[orig_patent_app_number] => 931074 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/931074
Self latching input buffer Aug 16, 1992 Issued
Array ( [id] => 3014968 [patent_doc_number] => 05276363 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-04 [patent_title] => 'Zero power decoder/driver' [patent_app_type] => 1 [patent_app_number] => 7/929260 [patent_app_country] => US [patent_app_date] => 1992-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1363 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/276/05276363.pdf [firstpage_image] =>[orig_patent_app_number] => 929260 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/929260
Zero power decoder/driver Aug 12, 1992 Issued
Array ( [id] => 3043803 [patent_doc_number] => 05376843 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-27 [patent_title] => 'TTL input buffer with on-chip reference bias regulator and decoupling capacitor' [patent_app_type] => 1 [patent_app_number] => 7/929872 [patent_app_country] => US [patent_app_date] => 1992-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2939 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/376/05376843.pdf [firstpage_image] =>[orig_patent_app_number] => 929872 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/929872
TTL input buffer with on-chip reference bias regulator and decoupling capacitor Aug 10, 1992 Issued
Array ( [id] => 3084021 [patent_doc_number] => 05321320 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-14 [patent_title] => 'ECL driver with adjustable rise and fall times, and method therefor' [patent_app_type] => 1 [patent_app_number] => 7/924561 [patent_app_country] => US [patent_app_date] => 1992-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 5366 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/321/05321320.pdf [firstpage_image] =>[orig_patent_app_number] => 924561 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/924561
ECL driver with adjustable rise and fall times, and method therefor Aug 2, 1992 Issued
Array ( [id] => 3100719 [patent_doc_number] => 05298803 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-29 [patent_title] => 'Programmable logic device having low power microcells with selectable registered and combinatorial output signals' [patent_app_type] => 1 [patent_app_number] => 7/914361 [patent_app_country] => US [patent_app_date] => 1992-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1788 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/298/05298803.pdf [firstpage_image] =>[orig_patent_app_number] => 914361 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/914361
Programmable logic device having low power microcells with selectable registered and combinatorial output signals Jul 14, 1992 Issued
07/911583 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE USING BICMOS TECHNOLOGY Jul 9, 1992 Abandoned
Array ( [id] => 3055318 [patent_doc_number] => 05283482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-01 [patent_title] => 'CMOS circuit for receiving ECL signals' [patent_app_type] => 1 [patent_app_number] => 7/909266 [patent_app_country] => US [patent_app_date] => 1992-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4021 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/283/05283482.pdf [firstpage_image] =>[orig_patent_app_number] => 909266 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/909266
CMOS circuit for receiving ECL signals Jul 5, 1992 Issued
Array ( [id] => 3055352 [patent_doc_number] => 05306965 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-26 [patent_title] => 'Process compensating variable impedence I/O driver with feedback' [patent_app_type] => 1 [patent_app_number] => 7/907362 [patent_app_country] => US [patent_app_date] => 1992-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4351 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/306/05306965.pdf [firstpage_image] =>[orig_patent_app_number] => 907362 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/907362
Process compensating variable impedence I/O driver with feedback Jun 30, 1992 Issued
Array ( [id] => 2942585 [patent_doc_number] => 05260613 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-09 [patent_title] => 'Real-data FFT buffer' [patent_app_type] => 1 [patent_app_number] => 7/906974 [patent_app_country] => US [patent_app_date] => 1992-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1253 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/260/05260613.pdf [firstpage_image] =>[orig_patent_app_number] => 906974 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/906974
Real-data FFT buffer Jun 29, 1992 Issued
Array ( [id] => 3055320 [patent_doc_number] => 05306963 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-26 [patent_title] => 'Address transition detection noise filter in pulse summation circuit for nonvolatile semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 7/901276 [patent_app_country] => US [patent_app_date] => 1992-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7865 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/306/05306963.pdf [firstpage_image] =>[orig_patent_app_number] => 901276 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/901276
Address transition detection noise filter in pulse summation circuit for nonvolatile semiconductor memory Jun 18, 1992 Issued
Array ( [id] => 3000179 [patent_doc_number] => 05362996 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-08 [patent_title] => 'Staggered output circuit for noise reduction' [patent_app_type] => 1 [patent_app_number] => 7/896673 [patent_app_country] => US [patent_app_date] => 1992-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3701 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/362/05362996.pdf [firstpage_image] =>[orig_patent_app_number] => 896673 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/896673
Staggered output circuit for noise reduction Jun 9, 1992 Issued
Array ( [id] => 2899133 [patent_doc_number] => 05272388 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-21 [patent_title] => 'High-yield methods for programming antifuses' [patent_app_type] => 1 [patent_app_number] => 7/895620 [patent_app_country] => US [patent_app_date] => 1992-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2384 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/272/05272388.pdf [firstpage_image] =>[orig_patent_app_number] => 895620 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/895620
High-yield methods for programming antifuses Jun 8, 1992 Issued
Array ( [id] => 3038664 [patent_doc_number] => 05329186 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-12 [patent_title] => 'CMOS bootstrapped output driver method and circuit' [patent_app_type] => 1 [patent_app_number] => 7/893879 [patent_app_country] => US [patent_app_date] => 1992-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2210 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/329/05329186.pdf [firstpage_image] =>[orig_patent_app_number] => 893879 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/893879
CMOS bootstrapped output driver method and circuit Jun 4, 1992 Issued
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