
Andrew Sanders
Examiner (ID: 1323)
| Most Active Art Unit | 2509 |
| Art Unit(s) | 2509, 2504 |
| Total Applications | 463 |
| Issued Applications | 431 |
| Pending Applications | 2 |
| Abandoned Applications | 30 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
| 07/458217 | DIFFERENTIAL INPUT BICMOS BUFFER-INVERTERS AND GATES | Dec 27, 1989 | Abandoned |
Array
(
[id] => 2697435
[patent_doc_number] => 05019724
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-28
[patent_title] => 'Noise tolerant input buffer'
[patent_app_type] => 1
[patent_app_number] => 7/453589
[patent_app_country] => US
[patent_app_date] => 1989-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 5979
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/019/05019724.pdf
[firstpage_image] =>[orig_patent_app_number] => 453589
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/453589 | Noise tolerant input buffer | Dec 19, 1989 | Issued |
Array
(
[id] => 2714023
[patent_doc_number] => 05017814
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-21
[patent_title] => 'Metastable sense circuit'
[patent_app_type] => 1
[patent_app_number] => 7/450802
[patent_app_country] => US
[patent_app_date] => 1989-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3140
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[pdf_file] => patents/05/017/05017814.pdf
[firstpage_image] =>[orig_patent_app_number] => 450802
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/450802 | Metastable sense circuit | Dec 12, 1989 | Issued |
Array
(
[id] => 2712136
[patent_doc_number] => 04982118
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-01
[patent_title] => 'Data acquisition system having a metastable sense feature'
[patent_app_type] => 1
[patent_app_number] => 7/450803
[patent_app_country] => US
[patent_app_date] => 1989-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 4348
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/982/04982118.pdf
[firstpage_image] =>[orig_patent_app_number] => 450803
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/450803 | Data acquisition system having a metastable sense feature | Dec 12, 1989 | Issued |
Array
(
[id] => 2703017
[patent_doc_number] => 04988899
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-29
[patent_title] => 'TTL gate current source controlled overdrive and clamp circuit'
[patent_app_type] => 1
[patent_app_number] => 7/450826
[patent_app_country] => US
[patent_app_date] => 1989-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 12235
[patent_no_of_claims] => 22
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/988/04988899.pdf
[firstpage_image] =>[orig_patent_app_number] => 450826
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/450826 | TTL gate current source controlled overdrive and clamp circuit | Dec 10, 1989 | Issued |
Array
(
[id] => 2684917
[patent_doc_number] => 05066873
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-11-19
[patent_title] => 'Integrated circuits with reduced switching noise'
[patent_app_type] => 1
[patent_app_number] => 7/444993
[patent_app_country] => US
[patent_app_date] => 1989-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3454
[patent_no_of_claims] => 25
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/066/05066873.pdf
[firstpage_image] =>[orig_patent_app_number] => 444993
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/444993 | Integrated circuits with reduced switching noise | Dec 3, 1989 | Issued |
Array
(
[id] => 2749669
[patent_doc_number] => 05012136
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-04-30
[patent_title] => 'High speed ECL to CMOS translator having reduced power consumption'
[patent_app_type] => 1
[patent_app_number] => 7/445529
[patent_app_country] => US
[patent_app_date] => 1989-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2023
[patent_no_of_claims] => 13
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/012/05012136.pdf
[firstpage_image] =>[orig_patent_app_number] => 445529
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/445529 | High speed ECL to CMOS translator having reduced power consumption | Dec 3, 1989 | Issued |
| 07/444478 | VARIABLE DRIVE OUTPUT BUFFER CIRCUIT | Nov 30, 1989 | Abandoned |
Array
(
[id] => 2698598
[patent_doc_number] => 05019786
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-28
[patent_title] => 'Phase measurement system using a dithered clock'
[patent_app_type] => 1
[patent_app_number] => 7/437575
[patent_app_country] => US
[patent_app_date] => 1989-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 6010
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/019/05019786.pdf
[firstpage_image] =>[orig_patent_app_number] => 437575
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/437575 | Phase measurement system using a dithered clock | Nov 16, 1989 | Issued |
Array
(
[id] => 2753203
[patent_doc_number] => 05030861
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-09
[patent_title] => 'Gate circuit having MOS transistors'
[patent_app_type] => 1
[patent_app_number] => 7/445687
[patent_app_country] => US
[patent_app_date] => 1989-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3302
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/030/05030861.pdf
[firstpage_image] =>[orig_patent_app_number] => 445687
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/445687 | Gate circuit having MOS transistors | Nov 15, 1989 | Issued |
Array
(
[id] => 2877595
[patent_doc_number] => 05091658
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-02-25
[patent_title] => 'Circuit configuration for noise signal compensation'
[patent_app_type] => 1
[patent_app_number] => 7/438333
[patent_app_country] => US
[patent_app_date] => 1989-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1981
[patent_no_of_claims] => 9
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[patent_words_short_claim] => 105
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/091/05091658.pdf
[firstpage_image] =>[orig_patent_app_number] => 438333
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/438333 | Circuit configuration for noise signal compensation | Nov 15, 1989 | Issued |
Array
(
[id] => 2685907
[patent_doc_number] => 05045722
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-03
[patent_title] => 'Output buffer preconditioning circuit'
[patent_app_type] => 1
[patent_app_number] => 7/436206
[patent_app_country] => US
[patent_app_date] => 1989-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2064
[patent_no_of_claims] => 19
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[patent_words_short_claim] => 152
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/045/05045722.pdf
[firstpage_image] =>[orig_patent_app_number] => 436206
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/436206 | Output buffer preconditioning circuit | Nov 13, 1989 | Issued |
Array
(
[id] => 2737268
[patent_doc_number] => 05039878
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-13
[patent_title] => 'Temperature sensing circuit'
[patent_app_type] => 1
[patent_app_number] => 7/434759
[patent_app_country] => US
[patent_app_date] => 1989-11-09
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/039/05039878.pdf
[firstpage_image] =>[orig_patent_app_number] => 434759
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/434759 | Temperature sensing circuit | Nov 8, 1989 | Issued |
Array
(
[id] => 2712119
[patent_doc_number] => 04982117
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-01
[patent_title] => 'Address transition detector circuit'
[patent_app_type] => 1
[patent_app_number] => 7/433912
[patent_app_country] => US
[patent_app_date] => 1989-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/982/04982117.pdf
[firstpage_image] =>[orig_patent_app_number] => 433912
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/433912 | Address transition detector circuit | Nov 8, 1989 | Issued |
| 07/433476 | POWER-ON STRAP INPUTS | Nov 7, 1989 | Abandoned |
Array
(
[id] => 2711026
[patent_doc_number] => 05013940
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-07
[patent_title] => 'Multi stage slew control for an IC output circuit'
[patent_app_type] => 1
[patent_app_number] => 7/431479
[patent_app_country] => US
[patent_app_date] => 1989-11-03
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[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3919
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/013/05013940.pdf
[firstpage_image] =>[orig_patent_app_number] => 431479
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/431479 | Multi stage slew control for an IC output circuit | Nov 2, 1989 | Issued |
Array
(
[id] => 2750905
[patent_doc_number] => 05015887
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-14
[patent_title] => 'A-B buffer circuit with TTL compatible output drive'
[patent_app_type] => 1
[patent_app_number] => 7/431517
[patent_app_country] => US
[patent_app_date] => 1989-11-03
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[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 2130
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/015/05015887.pdf
[firstpage_image] =>[orig_patent_app_number] => 431517
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/431517 | A-B buffer circuit with TTL compatible output drive | Nov 2, 1989 | Issued |
Array
(
[id] => 2716702
[patent_doc_number] => 05041890
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-20
[patent_title] => 'Pre-processing wafer for the output currents of detection diodes subjected to thermal radiation'
[patent_app_type] => 1
[patent_app_number] => 7/427256
[patent_app_country] => US
[patent_app_date] => 1989-10-25
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/041/05041890.pdf
[firstpage_image] =>[orig_patent_app_number] => 427256
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/427256 | Pre-processing wafer for the output currents of detection diodes subjected to thermal radiation | Oct 24, 1989 | Issued |
Array
(
[id] => 2771326
[patent_doc_number] => 05036226
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-30
[patent_title] => 'Signal converting circuit'
[patent_app_type] => 1
[patent_app_number] => 7/426615
[patent_app_country] => US
[patent_app_date] => 1989-10-23
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[patent_drawing_sheets_cnt] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/036/05036226.pdf
[firstpage_image] =>[orig_patent_app_number] => 426615
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/426615 | Signal converting circuit | Oct 22, 1989 | Issued |
Array
(
[id] => 2748077
[patent_doc_number] => 05023487
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-11
[patent_title] => 'ECL/TTL-CMOS translator bus interface architecture'
[patent_app_type] => 1
[patent_app_number] => 7/416193
[patent_app_country] => US
[patent_app_date] => 1989-09-29
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/023/05023487.pdf
[firstpage_image] =>[orig_patent_app_number] => 416193
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/416193 | ECL/TTL-CMOS translator bus interface architecture | Sep 28, 1989 | Issued |