Andrew W. Chriss

Array ( [id] => 19092540 [patent_doc_number] => 11953989 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Low-latency register error correction [patent_app_type] => utility [patent_app_number] => 17/991537 [patent_app_country] => US [patent_app_date] => 2022-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 10366 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17991537 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20110587 [patent_doc_number] => 12361311 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Quantum code with simpler pairwise checks [patent_app_type] => utility [patent_app_number] => 17/990316 [patent_app_country] => US [patent_app_date] => 2022-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4930 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17990316 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18210676 [patent_doc_number] => 20230056938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => DEFECT DETECTION IN MEMORY BASED ON ACTIVE MONITORING OF READ OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/972230 [patent_app_country] => US [patent_app_date] => 2022-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7479 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17972230 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18997632 [patent_doc_number] => 11914473 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-02-27 [patent_title] => Data recovery using ordered data requests [patent_app_type] => utility [patent_app_number] => 18/048289 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 25343 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18048289 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19130656 [patent_doc_number] => 20240136009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => DATA RECOVERY METHOD FOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/047661 [patent_app_country] => US [patent_app_date] => 2022-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18047661 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19130656 [patent_doc_number] => 20240136009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => DATA RECOVERY METHOD FOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/047661 [patent_app_country] => US [patent_app_date] => 2022-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18047661 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18239838 [patent_doc_number] => 20230072149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => VIRTUALIZATION OF COMPLEX NETWORKED EMBEDDED SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/046374 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7761 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18046374 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18378115 [patent_doc_number] => 20230153202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => MEMORY SYSTEM FOR PERFORMING RECOVERY OPERATION, MEMORY DEVICE, AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/965091 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11635 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965091 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18164181 [patent_doc_number] => 20230030776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => DYNAMIC CONTROL OF ERROR MANAGEMENT AND SIGNALING [patent_app_type] => utility [patent_app_number] => 17/963367 [patent_app_country] => US [patent_app_date] => 2022-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22041 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17963367 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18855578 [patent_doc_number] => 11853156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Error checking for systolic array computation [patent_app_type] => utility [patent_app_number] => 17/961623 [patent_app_country] => US [patent_app_date] => 2022-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 16747 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17961623 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18269308 [patent_doc_number] => 20230090550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => CODING CONTROL METHOD AND APPARATUS IN A PASSIVE OPTICAL NETWORK, COMMUNICATION DEVICE AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/956169 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17956169 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19069541 [patent_doc_number] => 20240103967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => Memory Decoder Providing Optimized Error Detection and Correction for Data Distributed Across Memory Channels [patent_app_type] => utility [patent_app_number] => 17/954464 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5497 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17954464 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19028670 [patent_doc_number] => 11928027 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-03-12 [patent_title] => System and method for error checking and correction with metadata storage in a memory controller [patent_app_type] => utility [patent_app_number] => 17/952453 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5750 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952453 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18278891 [patent_doc_number] => 20230094363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => Method and Apparatus for Decoding with Trapped-Block Management [patent_app_type] => utility [patent_app_number] => 17/952240 [patent_app_country] => US [patent_app_date] => 2022-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9781 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952240 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19015099 [patent_doc_number] => 11922031 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-03-05 [patent_title] => Apparatus with directed refresh management mechanism [patent_app_type] => utility [patent_app_number] => 17/952088 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6939 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952088 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18912061 [patent_doc_number] => 11875040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-16 [patent_title] => Semiconductor system for performing row hammering tracking operation [patent_app_type] => utility [patent_app_number] => 17/951984 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 17592 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17951984 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18252571 [patent_doc_number] => 20230079610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => GENERATING A PROTECTED AND BALANCED CODEWORD [patent_app_type] => utility [patent_app_number] => 17/950655 [patent_app_country] => US [patent_app_date] => 2022-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30962 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17950655 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19609628 [patent_doc_number] => 12158500 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => System and method which can reduce circuit area while performing test function [patent_app_type] => utility [patent_app_number] => 17/946055 [patent_app_country] => US [patent_app_date] => 2022-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3064 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17946055 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19092538 [patent_doc_number] => 11953987 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-04-09 [patent_title] => Trained states equalizer in a read channel [patent_app_type] => utility [patent_app_number] => 17/946399 [patent_app_country] => US [patent_app_date] => 2022-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 12758 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17946399 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19212624 [patent_doc_number] => 12001687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 17/942541 [patent_app_country] => US [patent_app_date] => 2022-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 12898 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17942541 [rel_patent_id] =>[rel_patent_doc_number] =>)