Search

Andrew W. Chriss

Supervisory Patent Examiner (ID: 3398, Phone: (571)272-1774 , Office: P/2479 )

Most Active Art Unit
2472
Art Unit(s)
2419, 2472, 2609, 2479, 2619, 2400, 2416
Total Applications
328
Issued Applications
163
Pending Applications
87
Abandoned Applications
81

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13569087 [patent_doc_number] => 20180336091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-22 [patent_title] => Method of Correcting an Error in a Memory Array in a DRAM During a Read Operation and a DRAM [patent_app_type] => utility [patent_app_number] => 15/982235 [patent_app_country] => US [patent_app_date] => 2018-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3459 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15982235 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/982235
Method of correcting an error in a memory array in a DRAM during a read operation and a DRAM May 16, 2018 Issued
Array ( [id] => 13421335 [patent_doc_number] => 20180262210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-13 [patent_title] => LDPC CODE MATRICES [patent_app_type] => utility [patent_app_number] => 15/974783 [patent_app_country] => US [patent_app_date] => 2018-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5277 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15974783 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/974783
LDPC CODE MATRICES May 8, 2018 Abandoned
Array ( [id] => 13524703 [patent_doc_number] => 20180313894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => SEMICONDUCTOR DEVICE AND TEST METHOD FOR SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/954665 [patent_app_country] => US [patent_app_date] => 2018-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10226 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15954665 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/954665
Semiconductor device and test method for semiconductor device Apr 16, 2018 Issued
Array ( [id] => 15001357 [patent_doc_number] => 20190319636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-17 [patent_title] => COMPONENT-EFFICIENT CYCLIC-REDUNDANCY-CHECK-CODE-COMPUTATION CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/954101 [patent_app_country] => US [patent_app_date] => 2018-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7981 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15954101 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/954101
Component-efficient cyclic-redundancy-check-code-computation circuit Apr 15, 2018 Issued
Array ( [id] => 15791091 [patent_doc_number] => 10629275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => Data storage device and operating method thereof [patent_app_type] => utility [patent_app_number] => 15/952949 [patent_app_country] => US [patent_app_date] => 2018-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 7100 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15952949 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/952949
Data storage device and operating method thereof Apr 12, 2018 Issued
Array ( [id] => 13360135 [patent_doc_number] => 20180231607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-16 [patent_title] => INTEGRATED CIRCUIT CHIP AND A METHOD FOR TESTING THE SAME [patent_app_type] => utility [patent_app_number] => 15/951228 [patent_app_country] => US [patent_app_date] => 2018-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12184 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 495 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15951228 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/951228
Integrated circuit chip and a method for testing the same Apr 11, 2018 Issued
Array ( [id] => 15854807 [patent_doc_number] => 10642688 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => System and method for recovery of unrecoverable data with enhanced erasure coding and replication [patent_app_type] => utility [patent_app_number] => 15/952176 [patent_app_country] => US [patent_app_date] => 2018-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9938 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15952176 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/952176
System and method for recovery of unrecoverable data with enhanced erasure coding and replication Apr 11, 2018 Issued
Array ( [id] => 16447985 [patent_doc_number] => 10839916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-17 [patent_title] => One-sided soft reads [patent_app_type] => utility [patent_app_number] => 15/948556 [patent_app_country] => US [patent_app_date] => 2018-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8821 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15948556 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/948556
One-sided soft reads Apr 8, 2018 Issued
Array ( [id] => 15729431 [patent_doc_number] => 10613143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => System and method for providing automation of microprocessor analog input stimulation [patent_app_type] => utility [patent_app_number] => 15/943871 [patent_app_country] => US [patent_app_date] => 2018-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3290 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15943871 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/943871
System and method for providing automation of microprocessor analog input stimulation Apr 2, 2018 Issued
Array ( [id] => 16202681 [patent_doc_number] => 10727869 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-28 [patent_title] => Efficient method for packing low-density parity-check (LDPC) decode operations [patent_app_type] => utility [patent_app_number] => 15/938760 [patent_app_country] => US [patent_app_date] => 2018-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 14233 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938760 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/938760
Efficient method for packing low-density parity-check (LDPC) decode operations Mar 27, 2018 Issued
Array ( [id] => 15674411 [patent_doc_number] => 10601450 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => List management for parallel operations of polar codes [patent_app_type] => utility [patent_app_number] => 15/937503 [patent_app_country] => US [patent_app_date] => 2018-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 17060 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15937503 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/937503
List management for parallel operations of polar codes Mar 26, 2018 Issued
Array ( [id] => 15333663 [patent_doc_number] => 20200007161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => TECHNIQUES FOR EMPLOYING POLAR CODE IN CONNECTION WITH NR (NEW RADIO) [patent_app_type] => utility [patent_app_number] => 16/488309 [patent_app_country] => US [patent_app_date] => 2018-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15222 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16488309 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/488309
Techniques for employing polar code in connection with NR (new radio) Mar 21, 2018 Issued
Array ( [id] => 15137011 [patent_doc_number] => 10481973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Memory module with dedicated repair devices [patent_app_type] => utility [patent_app_number] => 15/907210 [patent_app_country] => US [patent_app_date] => 2018-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6006 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15907210 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/907210
Memory module with dedicated repair devices Feb 26, 2018 Issued
Array ( [id] => 15640833 [patent_doc_number] => 10593419 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-17 [patent_title] => Failing read count diagnostics for memory built-in self-test [patent_app_type] => utility [patent_app_number] => 15/894046 [patent_app_country] => US [patent_app_date] => 2018-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6044 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15894046 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/894046
Failing read count diagnostics for memory built-in self-test Feb 11, 2018 Issued
Array ( [id] => 15219843 [patent_doc_number] => 20190372608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => A LOW COMPLEXITY PUNCTURING METHOD FOR LOW-RATE POLAR CODES [patent_app_type] => utility [patent_app_number] => 16/474474 [patent_app_country] => US [patent_app_date] => 2018-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8631 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16474474 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/474474
Low complexity puncturing method for low-rate polar codes Feb 6, 2018 Issued
Array ( [id] => 16575341 [patent_doc_number] => 10897272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-19 [patent_title] => Transmission method and reception device [patent_app_type] => utility [patent_app_number] => 16/477120 [patent_app_country] => US [patent_app_date] => 2018-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 201 [patent_figures_cnt] => 214 [patent_no_of_words] => 74898 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 1043 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16477120 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/477120
Transmission method and reception device Feb 5, 2018 Issued
Array ( [id] => 13350907 [patent_doc_number] => 20180226993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => Efficient recovery of lost packets using double parity forward error correction [patent_app_type] => utility [patent_app_number] => 15/890203 [patent_app_country] => US [patent_app_date] => 2018-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14320 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15890203 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/890203
Efficient recovery of lost packets using double parity forward error correction Feb 5, 2018 Issued
Array ( [id] => 13350913 [patent_doc_number] => 20180226996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => Efficient double parity forward error correction on a communication network [patent_app_type] => utility [patent_app_number] => 15/890187 [patent_app_country] => US [patent_app_date] => 2018-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14264 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15890187 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/890187
Efficient double parity forward error correction on a communication network Feb 5, 2018 Issued
Array ( [id] => 13352805 [patent_doc_number] => 20180227942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => TECHNIQUES OF DCI MESSAGES AGGREGATION [patent_app_type] => utility [patent_app_number] => 15/888243 [patent_app_country] => US [patent_app_date] => 2018-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12875 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15888243 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/888243
TECHNIQUES OF DCI MESSAGES AGGREGATION Feb 4, 2018 Abandoned
Array ( [id] => 13352697 [patent_doc_number] => 20180227888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => TECHNIQUES OF DECODING AGGREGATED DCI MESSAGES [patent_app_type] => utility [patent_app_number] => 15/888256 [patent_app_country] => US [patent_app_date] => 2018-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14301 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15888256 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/888256
TECHNIQUES OF DECODING AGGREGATED DCI MESSAGES Feb 4, 2018 Abandoned
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